• Journal of the Korean Institute of Telematics and Electronics
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• v.10 no.5
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• pp.1-6
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• 1973

The paper deals with a study on an electronic watering device. The system is designed to scan 10 probes so that they detect moisture of soil. Input potentials are compared with reference level before the system is watering. rt provides a main clock oscillator and a control oscillator for the system control, and a programmable unijunction transistor is used for the control circuit. The reference levels are adjustable so as to water various soils. The device is tested for two different sails of moisture content ranging from 6 to 51%. It works at any input level higher than 0.6 V compared to the reference level.

• Journal of the Korean Academy of Esthetic Dentistry
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• v.32 no.2
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• pp.54-68
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• 2023

Treatment planning of edentulous patient with digital method is materialized by designing the surgical guide. When designing the surgical guide, we first implement the shape of the final prosthesis in the virtual space and then materialize the implantation plan based on this. However, it is challenging to make surgical guides for edentulous patients as their lack of both the reference for the arrangement of teeth and interocclusal relationship makes it hard to envision the shape of the final prosthesis. If there exists good partial or complete dentures or residual teeth, its teeth arrangement can be used as a reference for the virtual final prosthesis and the subsequent surgical guide. If such a reference is absent or unsatisfactory, a process of manufacturing a complete denture for diagnostic purposes and verifying it on patient's mouth is necessary and use it as a new reference for the virtual final prosthesis. But even if a surgical guide is produced through the reference from the thorough reflection of the virtual final prosthesis, when we use it in the surgical field, the intraoral condition of the patient may make the implants deviated from planned in the surgical guide. In the worst case, if the positioning of the surgical guide on the mouth is incorrect, it can lead to a catastrophic error that displaces all the implant, in which case the guided surgery would be much worse than the non-guided one. In this article, we will discuss how to obtain references of tooth arrangements in a timely manner and align or register them into a unified coordinate system in digital space, and also introduce how to transfer such an implantation plan from the virtual world into the patient's mouth of real world with minimum error. And lastly, I would like to express my opinion on the establishment of a rational and systematic protocol of guided surgery of the edentulous patients.

• Journal of the Korea Society of Computer and Information
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• v.23 no.8
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• pp.1-7
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• 2018

Previous test equipment was bulky, took a long time to check, and was somewhat less economical. Since most of the checks were about analog signals, we preferred to check them using reference equipments. In this paper, a digital circuit design based on AITS is used to implement signals that can not utilize commercial measurement resources, and also designed and manufactured equipment that can inspect SRU. These test equipments were tested and evaluated by development, operation, and field evaluation, and they were installed to the Korean Field Force. This contributed to the improvement of operability by shortening the inspection time from 83.2 minutes to 7.8 minutes on average In addition, it did not utilize the reference equipment, so it could play a big role in lowering the mass production cost.

• Journal of Advanced Marine Engineering and Technology
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• v.16 no.4
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• pp.50-59
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• 1992

The paper presents a digital speed control approach of induction motor systems by using a digital servo control method and a well-known second order differential equation as model. The basic concept of using the modeling equation stated in the above is induced from the control theory stand point such that we can describe usually the motor system connected by inverter, generator and load etc, just as a mechanical system to be controlled. The concept does not demand us the complicated vector-based modeling equation adopted in the traditional methods for the speed control of induction motor. Futhermore, the proposed speed control system can be treated as a single input and single output system. The effectiveness of the servo control system obtained by the above-mentioned design concept is illustrated by the experimental results in the presence of both step reference changes and load variations. It is observed from the experimental results that the steady state-error of the experimental set up becomes zero after some regulation time and the induction motor system is robust in spite of reference signal changes and load variations.

• Journal of the Korean Society of Fisheries and Ocean Technology
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• v.28 no.1
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• pp.27-38
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• 1992

The paper presents a digital speed control approach of induction motor systems by using a digital redesign method and adopting a well known 2nd order model as the system model equation. The basic concept using the modeling equation is induced from the control theory stand point such that we can describe usually the motor system connected by inverter, generator and load etc. just as a mechanical system to be controlled. The concept does not demand us the complicated vector-based modeling equation adopted in the traditional methods for the speed control of induction motor. The effectiveness of the servo control system composed by the above mentioned design concept is illustrated by the experimental results in the presence of step reference change and generator load variation. It is observed from the experimental results that the steady state error of the experimental set up becomes zero after some regulation time and the induction motor system is robust in spite of reference signal change and load variation of generator.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.346-351
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• 1998

In design of a digital current controller for a 3-phase (3 ) voltage-source (VS) PWM converter, its conventional model, i.e., stationary or synchronous reference frame model, is used in obtaining its discretized version. It introduces, however, inherent errors since the following practical problems are not taken into consideration: the characteristics of the space vector-based pulse-width modulation (SVPWM) and the time delays in the process of sampling and computation. In this paper, the new hybrid reference frame model of the 3 VS PWM converter is proposed considering these problems. In addition, the direct digital current controller based on this model is designed without any prediction or extrapolation algorithm to compensate the time delay. So the control algorithm is made very simple. It represents no steady-state error in input current control and has the optimized transient responses. The validity of the proposed algorithm is proved by the computer simulation and experimental results.

• Journal of electromagnetic engineering and science
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• v.17 no.3
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• pp.138-146
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• 2017

A phase-locked dielectric resonator oscillator (PLDRO) is an essential component of millimeter-wave communication, in which phase noise is critical for satisfactory performance. The general structure of a PLDRO typically includes a dual loop of digital phase-locked loop (PLL) and analog PLL. A dual-loop PLDRO structure is generally used. The digital PLL generates an internal voltage controlled crystal oscillator (VCXO) frequency locked to an external reference frequency, and the analog PLL loop generates a DRO frequency locked to an internal VCXO frequency. A dual loop is used to ease the phase-locked frequency by using an internal VCXO. However, some of the output frequencies in each PLL structure worsen the phase noise because of the N divider ratio increase in the digital phase-locked loop integrated circuit. This study examines the design aspects of an interconnected PLL structure. In the proposed structure, the voltage tuning; which uses a varactor diode for the phase tracking of VCXO to match with the external reference) port of the VCXO in the digital PLL is controlled by one output port of the frequency divider in the analog PLL. We compare the proposed scheme with a typical PLDRO in terms of phase noise to show that the proposed structure has no performance degradation.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.4 no.2
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• pp.63-70
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• 2003

In this paper, an MFC (Mass Flow Controller) which is widely used in many semiconductor manufacturing processes for controlling the mass flow rate of a gas is designed and implemented using the PIC 16F876 of Microchip, Inc. The MFC implemented in this thesis has the form of hybrid-type, i.e., the mixed-type of the analog-type MFC, which has many problems such as low accurary, and digital-type MFC, which use an expensive DSP (Digital Signal Processor) and an ADC (Analog to Digital Convertor) with high precision. The MFC is consists of the sensor unit, the control unit and the actuator unit, and it has used the automatic calibration algorithm and the reference table method for the improvement of the performance.

• Journal of Electrical Engineering and Technology
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• v.10 no.4
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• pp.1655-1666
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• 2015

This paper proposes a new approach of Field Programmable Gate Array (FPGA) controlled digital implementation of shunt active power filter (SAPF) under steady state and dynamic operations. Typical implementations of SAPF uses microprocessor and digital signal processor (DSP) but it limited for complex algorithm structure, absence of feedback loop delays and their cost can be exceed the benefit they bring. In this paper, the hardware resources of an FPGA are configured and implemented in order to overcome conventional microcontroller or digital signal processor implementations. This proposed FPGA digital implementation scheme has very less execution time and boosts the overall performance of the system. The FPGA controller integrates the entire control algorithm of an SAPF, including synchronous reference frame transformation, phase locked loop, low pass filter and inverter current controller etc. All these required algorithms are implemented with a single all-on chip FPGA module which provides freedom to reconfigure for any other applications. The entire algorithm is coded, processed and simulated using Xilinx 12.1 ISE suite to estimate the advantages of the proposed system. The coded algorithm is also defused on a single all-on-chip Xilinx Spartan 3A DSP-XC3SD1800 laboratory prototype and experimental results thus obtained match with simulated counterparts under the dynamic state and steady state operating conditions.

• Journal of the Optical Society of Korea
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• v.13 no.2
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• pp.245-250
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• 2009

We propose a digital holographic interference analysis method based on a 2-frame phase-shifting technique for measuring an optical mirror surface. The technique using 2-frame phase-shifting digital interferometry is more efficient than multi-frame phase-shifting techniques because the 2-frame method has the advantage of a reduced number of interferograms, and then takes less time to acquire the wanted topography information from interferograms. In this measurement system, 2-frame phase-shifting digital interferograms are acquired by moving the reference flat mirror surface, which is attached to a piezoelectric transducer, with phase step of 0 or $\pi$/2 in the reference beam path. The measurements are recorded on a CCD detector. The optical interferometry is designed on the basis of polarization characteristics of a polarizing beam splitter. Therefore the noise from outside turbulence can be decreased. The proposed 2-frame algorithm uses the relative phase difference of the neighbor pixels. The experiment has been carried out on an optical mirror which flatness is less than $\lambda$/4. The measurement of the optical mirror surface topography using 2-frame phase-shifting interferometry shows that the peak-to-peak value is calculated to be about $0.1779{\mu}m$, the root-mean-square value is about $0.034{\mu}m$. Thus, the proposed method is expected to be used in nondestructive testing of optical components.