• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2593-2596
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• 2003

The deadbeat properties have been well known in designing digital control systems. But recently several researchers proposed a CDBC(Continuout-time DeadBeat Controller) in continuous time. They used delay or smoothing elements from the finite Laplace Transform. A delay element is made by the exponential terms. A smoothing element is used to smooth the digital control input. And eventually the process is argumentd with smoothing elements and then well-known digital deadbeat controller is designed Sometimes samplings are done in continuous time systems and some hold devices are used to relate to digital systems. So multirate sampling may enhance the efficiency of the CDBC. A DC servo motor is chosen for implementing CDBC algorithm. Especially Outputs according to the variable input and disturbance are simulated. by use of Matlab Simulink.

• Proceedings of the IEEK Conference
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• 2000.06a
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• pp.73-76
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• 2000

In tendency of digitalization, we studied about the purpose of digital modem for MRI spectrometer and advantage of digital modem compared with analog one. We introduce requirements lot designing transmitter of high speed digital modem for MRl spectrometer We also introduce its top-level and mid-level architecture. The transmitter is composed of CPC-P interface block, DUC & DAC block, RF block, master clock generation block, MCU block. Especially, DUC and its control parts are studied in detail. DUC and DAC can operate up to 52MHz and 100Msps, respectively. However we uses 35MHz as master clock and this paper shows its validity through simulations.

• Journal of Electrical Engineering and Technology
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• v.4 no.3
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• pp.423-428
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• 2009

In FIR (Finite Impulse Response) filter applications, Nth-band FIR digital filters are known to be important due to their reduced computational requirements. The conventional methods for designing FIR filters use iterative approaches such as the well-known Parks-McClellan algorithm. The Parks-McClellan algorithm is also used to design Nth-band FIR digital filters after Mintzer's research. However, a disadvantage of the Parks-McClellan algorithm is that it needs a large amount of design time. This paper describes a direct design method for Nth-band FIR Filters using Chebyshev polynomials, which provides a reduced design time over indirect methods such as the Parks-McClellan algorithm. The response of the resulting filter is equi-ripple in passband. Our proposed method produces a passband response that is equi-ripple to within a minuscule error, comparable to that of Mintzer's design method which uses the Parks-McClellan algorithm.

• Proceedings of the Korean Institute of Interior Design Conference
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• 2004.05a
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• pp.167-170
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• 2004

This study proposes the method seeking out the user needs for the home automation systems which are one of the compositions of digital home. The findings are as follows. (1) The designing of digital home should be based on the residents' daily life and the their needs for the future house prior to the digital technology, (2) The IT Apartments recently developed in Busan set up the safety and security system and the automatic ventilation system mostly. (3) The residents are more concerned of the safety and security and the comfortable interior environment than convenience and entertainments. (4) The residents have diverse needs for the home automation systems according to their age, residential experience and occupation.

• Proceedings of the KWS Conference
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• 2000.04a
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• pp.99-102
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• 2000

Conventionally, ZVS FB DC/DC converter was controlled by monolithic IC UC3879, which includes the functions of oscillator, error amplifier and phase-shift circuit. Also, microprocessor and DSP have been widely used for the remote control and for the immediate waveform control in ZVS FB DC/DC converter. However the conventional microprocessor controller is complex and difficult to control because the controller consists of analog and digital parts. In the case of the control of FB DC/DC converter, the output is required of driving a direct signal to the switch drive circuits by the digital controller. So, this paper presents the method and realization of designing the digital-to-phase shift PWM circuit controlled by DSP (TMX320C32) in a 2,500A, 40㎾ WS FB DC/DC converter.

• Proceedings of the KIEE Conference
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• 2005.10b
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• pp.619-621
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• 2005

This paper proposes apractical design method for ship-to-ship missiles' autopilot. When the pre-designed analogue autopilot is implemented in digital way, theygenerally suffer from severe performance degradation and instability problem even for a sufficiently small sampling time. Also, aerodynamic uncertainties can affect the overall stability and this happens more severely when the nonlinear autopilot is digitally implemented. In order to realize a practical autopilot, two main issues, digital implementation problem and compensation for the aerodynamic uncertainties, are considered in this paper. MIMO (multi-input multi-output) nonlinear autopilot is presented first and the input and output of the missile are discretized for implementation. In this step, the discretization effect is compensated by designing an additional control input. Finally, we design a parameter adaptation law to compensate the control performance. Stability analysis and 6-DOF (degree-of-freedom) simulations are presented to verify the proposed adaptive autopilot.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.907-910
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• 2003

We have developed Logic Design Training Kit for studying, actual training, designing of FPGA(Xillinx) or CPLD(ALTERA CPLD), the Digital Logic Device. This training kit has 12 matrix keys, RS232 port for serial communication and uses LED array. six FND(Dynamic), LCD as display part. That is standard specification for digital logic training kit. Special point of this kit is that we make two logic device trainig kit. This two logic device kit have more smaller and simple architecture because only uses one chip. That chip already includes a lot of functions that need for training kit, such as : complex logic circuit needed the two kind of logic devices, 16 way of system clock deviding function, serial communication interrupt....etc. We called that one chip is Center Bridge Chipset ; Xillinx FPGA Spartan2. User can select between using one device of FPGA or CPLD, or uses both them. Because of, Center Bridge Chipset has profitable architecture. it can work as Logic Device's networking with Master-Slave connection When using both logic devices.

• Journal of Ocean Engineering and Technology
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• v.23 no.1
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• pp.152-157
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• 2009

In designing and manufacturing a submarine, an expensive real mock up is usually built as a reference because of the spatial constraints of a submarine. This paper presents an integrated and automated design process for a submarine that uses a digital mock up. Various equipment libraries are built for feature based design. Using the developed digital mock up, this paper shows various ways to verify the design, including a space analysis to check for any interference between pieces of equipment and the hull and an ergonomic analysis using lifelike dummies to examine the work space and operability. As a part of the integrated design system, a design automation system was also developed to generate surface point data for the outer hull, pressure hull, casing, and sail. The whole process was applied to the design of a submarine for verification.

• Proceedings of the Korean Society of Marine Engineers Conference
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• 2005.06a
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• pp.314-320
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• 2005

In this paper, a methodology for estimating the parameters of a discrete-time system and designing a digital PID controller based on the estimated model and a genetic algorithm is presented. To deal with optimization problems occurring regarding parameter estimation and controller design, a pseudo parallel genetic algorithm (PPGA) is used. The parameters of a discrete-time system are estimated using both the model technique and a PPGA. The digital PID controller is described by the pulse transfer function and its parameters are tuned based on both the model reference technique and another PPGA. A set of experimental works on two processes are carried out to illustrate the performance of the proposed method.

• Proceedings of the Korean Institute of Intelligent Systems Conference
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• 2006.11a
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• pp.293-296
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• 2006

This paper presents new sufficient conditions to an intelligent digital redesign (IDR). The purpose of the IDR is to effectively convert an existing continuous-time fuzzy controller to an equivalent sampled-data fuzzy controller in the sense of the state-matching. The state-matching error between the closed-loop trajectories is carefully analyzed using the integral quadratic functional approach. The problem of designing the sampled-data fuzzy controller to minimize the state-matching error as well as to guarantee the stability is formulated and solved as the convex optimization problem with linear matrix inequality (LMI) constraints.