• 한국전자파학회:학술대회논문집
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• 한국전자파학회 2003년도 종합학술발표회 논문집 Vol.13 No.1
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• pp.213-218
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• 2003

Because of the development of digital technology, modern digital instrumentation & control systems are being innovativly developed in industrial plants. Whereas, many analog systems are still being used in nuclear plants, because of the demerits of digital equipment. As known, the demerits of digital equipment are the uncertainty and weaknesses in ambient environments such as smoke & electromagnetic interference In an Integral Reactor, a digital I&C system will be composed of microprocessor, memory and network card. Designers will apply new technique for digital equipment. Thus, it is important for digital I&C systems to operate according to designed functions & performance in the ambient environments during a life cycle. Digital I&C systems should have tolerance in such environments and environment qualification should be concluded To acquire electromagnetic interference qualification of digital equipment, this paper suggests an EMI test requirement. Designers should consider the electromagnetic compatibility and test digital equipment according to each test procedure. This paper involves an EMI test requirement and the results analysis of EUT(Equipment Under Test). Test result analysis will be used as electromagnetic compatibility design guides for Integral Reactor I&C systems.

• Nuclear Engineering and Technology
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• 제55권12호
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• pp.4367-4381
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• 2023

Nuclear power plants are increasingly being equipped with digital I&C systems. Although some probabilistic safety assessment (PSA) models for the digital I&C of nuclear power plants have been constructed, there is currently no specific internationally agreed guidance for their modeling. This paper presents an initiative by the OECD Nuclear Energy Agency called "Digital I&C PSA - Comparative application of DIGital I&C Modelling Approaches for PSA (DIGMAP)", which aimed to advance the field towards practical and defendable modeling principles. The task, carried out in 2017-2021, used a simplified description of a plant focusing on the digital I&C systems important to safety, for which the participating organizations independently developed their own PSA models. Through comparison of the PSA models, sensitivity analyses as well as observations throughout the whole activity, both qualitative and quantitative lessons were learned. These include insights on failure behavior of digital I&C systems, experience from models with different levels of abstraction, benefits from benchmarking as well as major contributors to the core damage frequency and those with minor effect. The study also highlighted the challenges with modeling of large common cause component groups and the difficulties associated with estimation of key software and common cause failure parameters.

• 전기학회논문지
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• 제56권10호
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• pp.1852-1858
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• 2007

To Increase availability and to enhance the safety, the modernization of Instrumentation & Control (I&C) systems is considered. The extended use of the digital technology lets nuclear power plants(NPPs) to replace their old analog systems with some proven digital systems. To adapt digital equipment to plants effectively and systematically, however, there must be an essential prerequisite, which is to evaluate current I&C equipment. This paper shows a practical methodology to evaluate the current status and reliability of I&C systems of NPPs using Reliability Evaluation System(RES) before performing upgrades or replacements for systems. The proposed method was applied to KORI Unit 2. The proposed method shows the current status of operating I&C systems effectively for upgrading I&C systems.

• Nuclear Engineering and Technology
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• 제44권6호
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• pp.697-708
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• 2012

The majority of instrumentation and control (I&C) systems in today's nuclear power plants (NPPs) are based on analog technology. Thus, most existing I&C systems now face obsolescence problems. Existing NPPs have difficulty in repairing and replacing devices and boards during maintenance because manufacturers no longer produce the analog devices and boards used in the implemented I&C systems. Therefore, existing NPPs are replacing the obsolete analog I&C systems with advanced digital systems. New NPPs are also adopting digital I&C systems because the economic efficiencies and usability of the systems are higher than the analog I&C systems. Digital I&C systems are based on two technologies: a microprocessor based system in which software programs manage the required functions and a programmable logic device (PLD) based system in which programmable logic devices, such as field programmable gate arrays, manage the required functions. PLD based systems provide higher levels of performance compared with microprocessor based systems because PLD systems can process the data in parallel while microprocessor based systems process the data sequentially. In this research, a bistable trip logic in a reactor protection system (RPS) was developed using very high speed integrated circuits hardware description language (VHDL), which is a hardware description language used in electronic design to describe the behavior of the digital system. Functional verifications were also performed in order to verify that the bistable trip logic was designed correctly and satisfied the required specifications. For the functional verification, a random testing technique was adopted to generate test inputs for the bistable trip logic.

• Nuclear Engineering and Technology
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• 제36권2호
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• pp.184-195
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• 2004

The multi-tasking feature of digital I&C equipment could increase risk concentration because the I&C equipment affects the actuation of the safety functions in several ways. Anticipated Transient without Scram (ATWS) is a typical case of safety function failure in nuclear power plants. In a conventional analysis, mechanical failures are treated as the main contributors of the ATWS. This paper quantitatively presents the probability of the ATWS based on a fault tree analysis of a Korea Standard Nuclear Power Plant is also presented. An analysis of the digital equipment in the digital plant protection system. The results show that the digital system severely affects the ATWS frequency. We also present the results of a sensitivity study, which show the effects of the important factors, and discuss the dependency between human operator failure and digital equipment failure.

• 한국전자통신학회논문지
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• 제6권6호
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• pp.839-847
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• 2011

원자력발전소의 계측제어계통은 제어, 감시기능을 수행하여 안전운전을 위한 두뇌 역할을 하는 핵심적인 분야이다. 최근 계측제어계통은 마이크로프로세서기반의 디지털 기술을 받아들여 디지털화되었다. 그러나 계측제어계통의 디지털시스템은 아날로그 기반 시스템에 비해 사이버위협에 매우 취약하여, 사이버공격에 의해 발전소 안전에 부정적인 영향을 받을 수 있다. 따라서 사이버침해에 대응할 수 있는 사이버 보안 대책이 계측제어계통에 요구된다. 사이버 보안성이 우수한 계통 설계를 위해서는 계측제어계통을 구성하는 자산에 대한 효과적인 자산분석이 요구된다. 본 연구에서는 원자로 계측제어설계의 사이버보안 적합성을 분석하기 위한 전 단계로 계측제어계통의 디지털 자산을 분석하기 위한 방법론을 제안한다. 제안된 디지털자산 분석 방법은 자산식별, 식별된 자산에 대한 평가방법으로 구성된다. 제안된 자산분석방법은 원자력발전소 계측제어계통의 사이버보안을 위한 자산분석에 응용하였다.

• 전기전자학회논문지
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• 제7권2호
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• pp.245-252
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• 2003

디지털 보정 기능을 갖는 CMOS 압력 센서의 인터페이스 회로를 설계하였다. 인터페이스 회로는 아날로그 부분과 디지털 부분으로 구성되어 있다. 아날로그 부분은 센서로부터 발생한 약한 신호를 증폭시키는 역할을 담당하고 디지털 부분은 온도 보상 및 오프셋 보정 기능을 담당하며 센서 칩과 보정을 조정하는 마이크로컨트롤러와의 통신을 담당한다. 디지털 부분은 I2C 직렬 인터페이스, 메모리, 트리밍 레지스터 및 제어기로 구성된다. I2C 직렬 인터페이스는 IO 핀 수 및 실리콘 면적 면에서 실리콘 마이크로 센서의 요구에 맞게 최적화 되었다. 이 설계의 주요 부분은 최적화된 I2C 프로토콜을 구현하는 제어 회로를 설계하는 것이다. 설계된 칩은 IDEC의 MPW를 통하여 제작되었다. 칩의 테스트를 위하여 테스트 보드를 제작하였으며 테스트 결과 예상한대로 디지털 보정기능이 잘 수행됨을 확인하였다.

• 한국통신학회논문지
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• 제38C권7호
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• pp.623-629
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• 2013

본 논문에서는 뇌파 전송 프로토콜 설계하고 이를 검증할 테스트 플랫폼 제작 결과를 소개한다. 건식 전극에서 검출된 뇌파는 인접한 ADC(analog-to-digital converter)를 거쳐 디지털 신호로 변환되고, 각 센서 노드에서 디지털 신호로 변환된 뇌파는 $I^2C$(inter-integrated circuit) 프로토콜을 통해서 DSP(digital signal processor) 플랫폼으로 전송된다. DSP 플랫폼에서는 뇌파 전처리 알고리즘 수행 및 뇌 특성 벡터 추출 등의 기능을 수행한다. 본 연구에서는 각 채널당 10비트 또는 12비트 ADC를 사용하여 최대 16채널의 데이터를 전송하기 위하여 $I^2C$ 프로토콜을 적용하였다. 실험결과 4바이트 데이터 버스트전송을 수행하면 통신오버헤드가 2.16배로 측정이 되어 10 비트 또는 12 비트 1 ksps ADC를 16채널로 사용시 총 데이터전송율이 각각 345.6 kbps, 414.72 kbps 로 확인되었다. 따라서 400 kbps 고속전송모드 $I^2C$를 사용할 경우 ADC 비트에 따라서 슬레이브와 마스터의 채널비가 각각 16:1, $(8:1){\times}2$ 로 되어야 한다.

• 조명전기설비학회논문지
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• 제26권6호
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• pp.87-93
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• 2012

In this paper, we propose an analog-to-digital converter to set the address of a I2C slave chip. The proposed scheme converts a fixed voltage between 0 and VDD to the digital value which can be used as the address of the slave chip. The rising time and the falling time are measured with digital counter in a serially connected RC circuit, while the circuit is being charged and discharged with the voltage to be measured. The ratio of the two measured values is used to get the corresponding digital value. This scheme gives a strong point which is to be implementable all the parts except comparator using digital logic. Although the method utilizes RC circuit, it has no relation with the RC value if the quantization error is disregarded. Experimental result shows that the proposed scheme gives 32-level resolution thus it can be used to configure the address of the I2C slave chip.

• 호남수학학술지
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• 제37권1호
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• pp.135-147
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• 2015

Owing to the notion of a normal adjacency for a digital product in [8], the study of product properties of digital topological properties has been substantially done. To explain a normal adjacency of a digital product more efficiently, the recent paper [22] proposed an S-compatible adjacency of a digital product. Using an S-compatible adjacency of a digital product, we also study product properties of digital topological properties, which improves the presentations of a normal adjacency of a digital product in [8]. Besides, the paper [16] studied the product property of two digital covering maps in terms of the $L_S$- and the $L_C$-property of a digital product which plays an important role in studying digital covering and digital homotopy theory. Further, by using HS- and HC-properties of digital products, the paper [18] studied multiplicative properties of a digital fundamental group. The present paper compares among several kinds of adjacency relations for digital products and proposes their own merits and further, deals with the problem: consider a Cartesian product of two simple closed $k_i$-curves with $l_i$ elements in $Z^{n_i}$, $i{\in}\{1,2\}$ denoted by $SC^{n_1,l_1}_{k_1}{\times}SC^{n_2,l_2}_{k_2}$. Since a normal adjacency for this product and the $L_C$-property are different from each other, the present paper address the problem: for the digital product does it have both a normal k-adjacency of $Z^{n_1+n_2}$ and another adjacency satisfying the $L_C$-property? This research plays an important role in studying product properties of digital topological properties.