• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.10
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• pp.2509-2515
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• 2014

In this paper, the conventional vertical structure for VLSI circuits CMOS intend to improve the stress effects of active region and built-in threshold voltage. For these improvement, the proposed structure is shallow trench isolation of moat shape. We want to analysis the electron concentration distribution, gate bias vs energy band, thermal stress and dielectric enhanced field of thermal damage between vertical structure and proposed moat shape. Physically based models are the ambient and stress bias conditions of TCAD tool. As an analysis results, shallow trench structure were intended to be electric functions of passive as device dimensions shrink, the electrical characteristics influence of proposed STI structures on the transistor applications become stronger the potential difference electric field and saturation threshold voltage, are decreased the stress effects of active region. The fabricated device of based on analysis results data were the almost same characteristics of simulation results data.

• Journal of the Korean Society of Safety
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• v.27 no.4
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• pp.13-19
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• 2012

The purpose of this study is to extract the major factors related to the deterioration mechanism of white organic light-emitting diodes(WOLED) by performing accelerated testing of temperature, voltage, time, etc., and to develop an accelerated life test(ALT) model. The measurement results of the brightness of the WOLED exhibited that their average brightness tended to increase as the operating voltage increased and that the half-life period of the brightness appeared after approximately 400 hours when the operating voltage was 20V and the ambient temperature was $85^{\circ}C$. It could be seen that although the WOLED showed comparatively the same brightness when the initial acceleration began after the operating voltage was applied to it, its brightness changed excessively after the WOLED's thermal storage had been made. In addition, it was observed that the half-life period was reduced as the ambient temperature and applied voltage increased. The strength of the WOLED which had been maintained in the range of visible light at the maximum load was reduced by the deterioration of the organic light emitting material due to the influence of the operating voltage and temperature, and the reduction of emitted light was small at low voltage and temperature. It could be seen that the failure of the WOLED during the ALT was caused by wear due to load accumulation over time, and that Weibull distribution was appropriate for the life distribution and acceleration was established between test conditions. From the WOLED analysis, it is thought that factors influencing the brightness deterioration are voltage, temperature, etc., and that comprehensive analysis considering discharge control, dielectric tangent margin, etc., would further increase the reliability.

• Transactions on Electrical and Electronic Materials
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• v.8 no.2
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• pp.53-57
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• 2007

In this study, a novel slurry containing ceria as the abrasive particles was analyzed in terms of its frictional, thermal and kinetic attributes for interlayer dielectric (ILD) CMP application. The novel slurry was used to polish 200-mm blanket ILD wafers on an $IC1000_{TM}$ K-groove pad with in-situ conditioning. Polishing pressures ranged from 1 to 5 PSI and the sliding velocity ranged from 0.5 to 1.5 m/s. Shear force and pad temperature were measured in real time during the polishing process. The frictional analysis indicated that boundary lubrication was the dominant tribological mechanism. The measured average pad leading edge temperature increased from 26.4 to $38.4\;^{\circ}C$ with the increase in polishing power. The ILD removal rate also increased with the polishing power, ranging from 400 to 4000 A/min. The ILD removal rate deviated from Prestonian behavior at the highest $p{\times}V$ polishing condition and exhibited a strong correlation with the measured average pad leading edge temperature. A modified two-step Langmuir-Hinshelwood kinetic model was used to simulate the ILD removal rate. In this model, transient flash heating temperature is assumed to dominate the chemical reaction temperature. The model successfully captured the variable removal rate behavior at the highest $p{\times}V$ polishing condition and indicates that the polishing process was mechanical limited in the low $p{\times}V$ polishing region and became chemically and mechanically balanced with increasing polishing power.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.15 no.4
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• pp.335-344
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• 2004

A low phase noise EQM(Engineering Qualified Model) LO(Local Oscillator) has been developed for Ka-band satellite transponder. A VCDRO(Voltage Controlled Dielectric Resonator Oscillator) is also designed using a high impedance inverter coupled with dielectric resonator to improve the phase noise performances out of the loop bandwidth. The mechanical analysis fur housing and the thermal analysis fur circuit board are achieved. This EQM LO is applied to Ka-band satellite transponder of EQM level after environmental experiments for space application. The LO has the harmonic suppression characteristics above 52 ㏈c and requires low power consumption under 1.3 watts. The phase noise characteristics are exhibited as -101.33 ㏈c/㎐ at 10 ㎑ offset frequency and -114.33 ㏈c/㎐ at 100 ㎑ offset frequency, with the output power of 14.0 ㏈m${\pm}$0.17 ㏈ over the temperature range of -15∼＋65$^{\circ}C$.

• Proceedings of the KIEE Conference
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• 1999.07d
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• pp.1803-1805
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• 1999

The thermal expansion coefficient of the titania-fused silica glass$(TiO_2-SiO_2)$ called KLR-1.1 is known to $0{\pm}0.03$ ppm/K, while that of normal fused-silica glasses is about +0.5 ppm/K at room temperature. To analysis the dielectric properties of the KLR-1.1, the sample with diameter of 30 mm and thinkness of 1 mm is covered with gold film. Its relative permittivity and dissipation factor of KLR-1.1 is evaluated to $4.011{\pm}0.012(1\sigma)$ and $(4.86{\pm}0.02){\times}10^{-4}(1{\sigma})$ at 1 kHz respectively. The measurement techniques used and results are more discussed in this paper.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.11a
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• pp.151-151
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• 2009

A enameled wire may have better corona-resistance when its coating material contains nano-sized inorganic particles. However, industrial applications are still limited because an aggregation between nanofillers may happen during coating processes. In this study we use a novel scheme of surface modification with silane on silica nanoparticles using sonochemical reaction where composition and surface density of silanes can be controlled in order to reduce particle-particle attractive interaction. Functionalized nanoparticles are evenly dispersed in the matrix confirmed by SEM and energy dispersive x-ray analysis. Dielectric strength and thermal resistance of the nanocomposite wires are improved while flexibility of the wire maintains.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1584-1585
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• 2011

분자의 전리(ionization)작용과 이온의 해리(dissociation)작용에 의한 유전체 내 방전해석을 위해서 전자, 양이온, 음이온의 생성과 소멸, 전자부착, 재결합 과정을 포함한 전하연속방정식, 전계에 의한 푸아송 방정식, 유전체 온도에 관한 열확산 방정식을 결합하여 해석하였다. 전계 방출 조건과 열전자 방출 조건이 경계조건으로 부여되었고 에너지 최소화 정류조건을 따르는 유한요소법(finite element method)을 이용하여 해석하였다. 비교적 작은 값을 가지는 확산성을 무시하고 대류성에 역점을 두어 발생하는 수치적 불안정은 인공확산항(artificial diffusion technique)을 도입하여 안정화하였다. 본 논문에서는 IEC standard 60897의 표준규격에 따른 2차원 축대칭 침-구 전극에 적용하여 제안된 다중물리해석기법의 타당성을 입증하였다.

• Proceedings of the KIEE Conference
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• 2009.07a
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• pp.1406_1407
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• 2009

Fowler-Nordheim의 전자 방출과 열전자 방출 메카니즘을 이용하여 절연유체 내 전계에 의한 도체의 음극에서 전자 방출현상과 열에 의한 열전자 방출현상을 고려하고 유한요소법(Finite Element Method)을 이용하여 해석하였다. 절연유체 내 공간전하에 대한 해석기법으로 푸아송 방정식, 양이온, 음이온, 전자에 대한 전하연속 방정식, 온도에 대한 열 확산 방정식으로 이루어진 5개의 지배방정식에 Fowler-Nordheim의 전계 방출과 Richardson-Dushman의 열전자 방출을 경계조건으로 부여하였다. 단자 전류는 유한요소법과 잘 부합하는 에너지법으로 계산되었다. 쌍 곡선형 PDE의 공간전하 전파에 대한 지배 방정식은 일반적으로 수치적인 불안정성을 가지므로 인공 확산 항을 고려하여 이를 해결하였다. 제안된 해석법은 세 개의 캐리어를 가진 x-y 좌표축의 2차원 평판 모델에 적용하여 그 유효성을 확인하였다.

• 한국전기화학회:학술대회논문집
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• 2001.06a
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• pp.189-192
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• 2001

In order to prepare the proton-conducting membrane with lower cost and higher ionic conductivity than commercialized one, the concept of incorporating the nitrogen acid to polymer backbone, is proposed. The synthesis, thermal, and temperature-variable impedance/electrical conductivity studies of poly (p-tolunesulfonylamido acrylate) are reported. This polymer can be prepared by reacting poly (acryloyl chloride) with ptolunesulfonamide and cast into homogeneous membranes. Thermogravimetric analysis (TGA) shows that the polymer is thermally stable up to about $200^{\circ}C$ and Differential scanning calorimetry (DSC) illustrates that the glass transition occur at around $67^{\circ}C$. The ionic conductivity measured by dielectric spectroscopy is in the range of $10^{-5}\;S/cm$ in dry atmosphere that it can be a candidate for the membrane of PEMFC or DMFC.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.352.2-352.2
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• 2014

In this present work, we report a Cu-Mn alloy as a materials for the self-forming barrier process. And we investigated diffusion barrier properties of self-formed layer on low-k dielectrics with or without UV curing treatment. Cu alloy films were directly deposited onto low-k dielectrics by co-sputtering, followed by annealing at various temperatures. X-ray diffraction revealed Cu (111), Cu (200) and Cu (220) peaks for both of Cu alloys. The self-formed layers were investigated by transmission electron microscopy. In order to compare barrier properties between Mn-based interlayer interlayer, thermal stability was measured with various low-k dielectrics. X-ray photoelectron spectroscopy analysis showed that chemical compositions of self-formed layer. The compositions of the Mn based self-formed barriers after annealing were determined by the C concentration in the dielectric layers.