• Journal of the Korean Society of Radiology
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• v.17 no.4
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• pp.625-631
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• 2023

The important requirement of industrial dynamic X-ray detector operating under high tube voltage up to 450 kVp for 24 hours and 7 days is to obtain significantly high radiation resistance. This study presents the radiation resistance characteristics of various thin film transistors (TFTs) with a-Si, poly-Si and IGZO semiconducting layers. IGZO TFT offering dozens of times higher field effect mobility than a-Si TFT was processed with highly hydrogenated plasma in between IGZO semiconducting layer and inter-layered dielectric. The hydrogenated IGZO TFT showed most sustainable radiation resistance up to 10,000Gy accumulated, thus, concluded that it is a sole switching device in X-ray imaging sensor offering dynamic X-ray imaging at high frame rate under extremely severe radiation environment such as automated X-ray inspection.

• Journal of the Korea Institute of Military Science and Technology
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• v.27 no.3
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• pp.311-318
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• 2024

In this paper, a design for a radio frequency(RF) and infrared(IR) absorber with metasurfaces is discussed in microwave frequency bands. The RF absorber includes double layers of metasurfaces to operate in S- and X-bands. Effects of sheet resistance of the metasurfaces and thicknesses of dielectric supporting layers on reflection responses are investigated. An IR stealth layer incorporates an array of conductive grids with slits to reflect IR signals but to transmit RF signals and visible rays. Periodicity of the grids and slits is studied for transmission responses in the X-band and a surface area ratio. Reflection responses of the RF/IR multispectral absorber are found to be lower than -10 dB and -16 dB in the S- and X-bands, respectively, from full-wave simulation. Finally, the RF/IR multispectral absorber is fabricated and its reflection responses are measured to verify designed performance.

• KSCE Journal of Civil and Environmental Engineering Research
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• v.33 no.1
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• pp.329-336
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• 2013

The infrastructure of flexible pavement is composed of aggregate subbase, anti-frost layer, and subgrade. In particular, the subgrade performance is affected by climates such as frost action and precipitation. The method of TDR(Time Domain Reflectometry) sensors to measure moisture contents in subgrade layer has been used in the research. Due to the TDR method using dielectric permitivity of soil and water, the sensors can be affected by the low subgrade temperatures. The air temperatures frequently drops below $-20^{\circ}C$ in the winter in Korea. As a result, it is necessary to estimate the accuracy of the TDR moisture sensors in the range of below zero temperatures. In this study, the subgrade temperatures of lower than $-2^{\circ}C$ were extended to evaluate temperature sensitivity of the TDR moisture sensors. The test results revealed that the moisture contents around the sensors were reduced while those of the upper part of specimen showed a tendency to increase as the specimen surface temperature drops below zero under the volumetric moisture contents(VMC) of 20% and 30%. However, the impact of temperature on the function of the sensor at lower water contents was found to be negligible if any.

• Journal of the Microelectronics and Packaging Society
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• v.15 no.3
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• pp.53-58
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• 2008

In this study, we fabricated embedded IC (Double Pole Double throw switch chip) polymer substrate and evaluate it for 2.4 GHz WiFi application. The switch chips were laminated using FR4 and ABF(Ajinomoto build up film) as dielectric layer. The embedded DPDT chip substrate were interconnected by laser via and Cu pattern plating process. DSC(Differenntial Scanning Calorimetry) analysis and SEM image was employed to calculate the amount of curing and examine surface roughness for optimization of chip embedding process. ABF showed maximum peel strength with Cu layer when the procuring was $80\sim90%$ completed and DPDT chip was laminated in a polymer substrate without void. An embedded chip substrate and wire-bonded chip on substrate were designed and fabricated. The characteristics of two modules were measured by s-parameters (S11; return loss and S21; insertion loss). Insertion loss is less than 0.55 dB in two presented embedded chip board and wire-bonded chip board. Return loss of an embedded chip board is better than 25 dB up to 6 GHz frequency range, whereas return loss of wire-bonding chip board is worse than 20 dB above 2.4 GHz frequency.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.12 no.6
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• pp.304-310
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• 2002

Novel charge trap type memory devices with reoxidized oxynitride gate dielectrics made by NO annealing and reoxidation process of initial oxide on substrate have been fabricated using 0.35 $\mu \textrm{m}$ retrograde twin well CMOS process. The feasibility for application as NVSM memory device and characteristics of traps have been investigated. For the fabrication of gate dielectric, initial oxide layer was grown by wet oxidation at $800^{\circ}C$ and it was reoxidized by wet oxidation at $800^{\circ}C$ after NO annealing to form the nitride layer for charge trap region for 30 minutes at $850^{\circ}C$. The programming conditions are possible in 11 V, 500 $\mu \textrm{s}$ for program and -13 V, 1ms for erase operation. The maximum memory window is 2.28 V. The retention is over 20 years in program state and about 28 hours in erase state, and the endurance is over $3 \times 10^3$P/E cycles. The lateral distributions of interface trap density and memory trap density have been determined by the single junction charge pumping technique. The maximum interface trap density and memory trap density are $4.5 \times 10^{10} \textrm{cm}^2$ and $3.7\times 10^{18}/\textrm{cm}^3$ respectively. After $10^3$ P/E cycles, interlace trap density increases to $2.3\times 10^{12} \textrm{cm}^2$ but memory charges decreases.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.5
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• pp.516-522
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• 2020

Water trees can cause considerable damage to the performance of underground cables. Theymay formwithin the dielectric used in buried or water-immersed high voltage cables. They grow in a bush-like or tree-like form, often taking decades before causing damage to a cable's performance. They are usually found on very old underground cables, often in an inaccessible place. It is costly and time-consuming to detect watertrees in underground cables. Tree detection technology, including mathematical modeling,can reduce the maintenance cost and time necessary for detecting these trees.To simulate detection of water trees in this study, a mathematical model ofan XLPE cable and a water tree were developed. The complex water tree structure was simplified, based on two identified patterns of aventedtree. A Matlab simulation was performed to calculate and analyze the capacitance and resistance of a cable insulation layer,based on growth of a watertree. Capacitance size increased about 0.025×10^-13[Farads/mm] compared to normal when the tree area of the cable was advanced to 95% of the insulation layer. The resistance value decreased by about 0.5×10¹⁶[ohm/m]. These changesand changesshowninaBurkes paper physical modeling simulation are similar.The value of mathematical modeling for detecting water trees and damage to underground cables has been demonstrated.

• Proceedings of the Korean Vacuum Society Conference
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• 2014.02a
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• pp.493-493
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• 2014

The manufacturing cost of thin-film photovoltics can potentially be lowered by minimizing the amount of a semiconductor material used to fabricate devices. Thin-film solar cells are typically only a few micrometers thick, whereas crystalline silicon (c-Si) wafer solar cells are $180{\sim}300\mu}m$ thick. As such, thin-film layers do not fully absorb incident light and their energy conversion efficiency is lower compared with that of c-Si wafer solar cells. Therefore, effective light trapping is required to realize commercially viable thin-film cells, particularly for indirect-band-gap semiconductors such as c-Si. An emerging method for light trapping in thin film solar cells is the use of metallic nanostructures that support surface plasmons. Plasmon-enhanced light absorption is shown to increase the cell photocurrent in many types of solar cells, specifically, in c-Si thin-film solar cells and in poly-Si thin film solar cell. By proper engineering of these structures, light can be concentrated and coupled into a thin semiconductor layer to increase light absorption. In many cases, silver (Ag) nanoparticles (NP) are formed either on the front surface or on the rear surface on the cells. In case of poly-Si thin film solar cells, Ag NPs are formed on the rear surface of the cells due to longer wavelengths are not perfectly absorbed in the active layer on the first path. In our cells, shorter wavelengths typically 300~500 nm are also not effectively absorbed. For this reason, a new concept of plasmonic nanostructure which is NPs formed both the front - and the rear - surface is worth testing. In this simulation Al NPs were located onto glass because Al has much lower parasitic absorption than other metal NPs. In case of Ag NP, it features parasitic absorption in the optical frequency range. On the other hand, Al NP, which is non-resonant metal NP, is characterized with a higher density of conduction electrons, resulting in highly negative dielectric permittivity. It makes them more suitable for the forward scattering configuration. In addition to this, Ag NP is located on the rear surface of the cell. Ag NPs showed good performance enhancement when they are located on the rear surface of our cells. In this simulation, Al NPs are located on glass and Ag NP is located on the rear Si surface. The structure for the simulation is shown in figure 1. Figure 2 shows FDTD-simulated absorption graphs of the proposed and reference structures. In the simulation, the front of the cell has Al NPs with 70 nm radius and 12.5% coverage; and the rear of the cell has Ag NPs with 157 nm in radius and 41.5% coverage. Such a structure shows better light absorption in 300~550 nm than that of the reference cell without any NPs and the structure with Ag NP on rear only. Therefore, it can be expected that enhanced light absorption of the structure with Al NP on front at 300~550 nm can contribute to the photocurrent enhancement.

• Journal of Sensor Science and Technology
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• v.11 no.3
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• pp.163-170
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• 2002

This paper proposes a $10\;{\mu}m$ thick oxide air-bridge structure which can be used as a substrate for RF circuits. The structure was fabricated by anodic reaction, complex oxidation and micromachining technology using TMAH etching. High quality films were obtained by combining low temperature thermal oxidation ($500^{\circ}C$, 1 hr at $H_2O/O_2$) and rapid thermal oxidation (RTO) process ($1050^{\circ}C$, 2 min). This structure is mechanically stable because of thick oxide layer up to $10\;{\mu}m$ and is expected to solve the problem of high dielectric loss of silicon substrate in RF region. The properties of the transmission line formed on the oxidized porous silicon (OPS) air-bridge were investigated and compared with those of the transmission line formed on the OPS layers. The insertion loss of coplanar waveguide (CPW) on OPS air-bridge was (about 2dB) lower than that of CPW on OPS layers. Also, the return loss of CPW on OPS air-bridge was less than about -20 dB at measured frequency region for 2.2 mm. Therefore, this technology is very promising for extending the use of CMOS circuitry to higher RF frequencies.

• Journal of Sensor Science and Technology
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• v.8 no.2
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• pp.115-123
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• 1999

A micro-gas sensor with heater and sensing electrode on the same plane was fabricated on phosphosilicate glass(PSG, 800nm)/$Si_3N_4$ (150nm) dielectric membrane. PSG film was provided by atmospheric pressure chemical vapor deposition(APCVD), and $Si_3N_4$ film by low pressure chemical vapor deposition (LPCVD). Total area of the fabricated device was $3.78{\times}3.78mm^2$. The area of diaphragm was $1.5{\times}1.5mm^2$, and that of the sensing layer was $0.24{\times}0.24mm^2$. Finite-element simulation was employed to estimate temperature distribution for a square-shaped diaphragm. The power consumption of Pt heater was about 85mW at $350^{\circ}C$. Tin thin films were deposited on the silicon substrate by thermal evaporation at room temperature and $232^{\circ}C$, and tin oxide films($SnO_2$) were prepared by thermal oxidation of the metallic tin films at $650^{\circ}C$ for 3 hours in oxygen ambient. The film analyses were carried out by SEM and XRD techniques. Effects of humidity and ambient temperature on the resistance of the sensing layer were found to be negligible. The fabricated micro-gas sensor exhibited high sensitivity to butane gas.

• Journal of Sensor Science and Technology
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• v.4 no.3
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• pp.80-88
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• 1995

This paper presents the fabrication of a metal-insulator-metal(MIM) antifuse structure consisting of insulators sandwiched between top electrode, Al, and bottom electrode, TiW and additionally studies on antifuse properties depending on the condition of insulator. The intermetallic insulators, prepared by means of sputter, comprised of silicon oxide and tantalum oxide. In such an antifuse structure, silicon oxide layer is utilized to decrease the leakage current and tantalum oxide layer, of which the dielectric strength is lower than that of silicon oxide, is also utilized to lower the breakdown voltage near 10V. Finally sufficient low leakage current, below 1nA, and low programming voltage, about 9V, could be obtained in antifuse device comprising $Al/Ta_{2}O_{5}(10nm)/SiO_{2}(10nm)/TiW$ structure and OFF resistance of 3$3.65M{\Omega}$ and ON resistance of $7.26{\Omega}$ could be also obtained. This $Ta_{2}O_{5}/SiO_{2}$ based antifuse structures will be promising for highly reliable programmable device.