• Title/Summary/Keyword: device degradation

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An Image Warping Method for Implementation of an Embedded Lens Distortion Correction Algorithm (내장형 렌즈 왜곡 보정 알고리즘 구현을 위한 이미지 워핑 방법)

  • Yu, Won-Pil;Chung, Yun-Koo
    • The KIPS Transactions:PartB
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    • v.10B no.4
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    • pp.373-380
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    • 2003
  • Most of low cost digital cameras reveal relatively high lens distortion. The purpose of this research is to compensate the degradation of image quality due to the geometrical distortion of a lens system. The proposed method consists of two stages : calculation of a lens distortion coefficient by a simplified version of Tsai´s camera calibration and subsequent image warping of the original distorted image to remove geometrical distortion based on the calculated lens distortion coefficient. In the lens distortion coefficient calculation stage, a practical method for handling scale factor ratio and image center is proposed, after which its feasibility is shown by measuring the performance of distortion correction using a quantitative image quality measure. On the other hand, in order to apply image warping via inverse spatial mapping using the result of the lens distortion coefficient calculation stage, a cubic polynomial derived from an adopted radial distortion lens model must be solved. In this paper, for the purpose of real-time operation, which is essential for embedding into an information device, an approximated solution to the cubic polynomial is proposed in the form of a solution to a quadratic equation. In the experiment, potential for real-time implementation and equivalence in performance as compared with that from cubic polynomial solution are shown.

AFTL: An Efficient Adaptive Flash Translation Layer using Hot Data Identifier for NAND Flash Memory (AFTL: Hot Data 검출기를 이용한 적응형 플래시 전환 계층)

  • Yun, Hyun-Sik;Joo, Young-Do;Lee, Dong-Ho
    • Journal of KIISE:Computer Systems and Theory
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    • v.35 no.1
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    • pp.18-29
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    • 2008
  • NAND Flash memory has been growing popular storage device for the last years because of its low power consumption, fast access speed, shock resistance and light weight properties. However, it has the distinct characteristics such as erase-before-write architecture, asymmetric read/write/erase speed, and the limitation on the number of erasure per block. Due to these limitations, various Flash Translation Layers (FTLs) have been proposed to effectively use NAND flash memory. The systems that adopted the conventional FTL may result in severe performance degradation by the hot data which are frequently requested data for overwrite in the same logical address. In this paper, we propose a novel FTL algorithm called Adaptive Flash Translation Layer (AFTL) which uses sector mapping method for hot data and log-based block mapping method for cold data. Our system removes the redundant write operations and the erase operations by the separating hot data from cold data. Moreover, the read performance is enhanced according to sector translation that tends to use a few read operations. A series of experiments was organized to inspect the performance of the proposed method, and they show very impressive results.

Sustainability Indices (=Green Star) for Microbial Fuel Cell (미생물 연료전지 영속발전 지표개발)

  • Song, Ha-Geun;KOO, Ja-Kong
    • Journal of the Korea Organic Resources Recycling Association
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    • v.23 no.2
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    • pp.47-52
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    • 2015
  • A microbial fuel cell (MFC) is a device that can be obtained electricity from a variety of organic through the catalytic reaction of the microorganism. The MFC can be applied to various fields, and research is required to promote the performance of the microbial fuel cell for commercialization. The lower performance of an MFC is due to oxygen reduction at the cathode and the longer time of microbial degradation at anode. The MFC amount of power is sufficient but, in consideration of many factors, as a renewable energy, now commonly power density as compared to Nafion117 it is an ion exchange membrane used is PP (Poly Propylene) from 80 to about 11 fold higher, while reducing the cost to process wastewater is changed to a microporous non-woven fabric of a low cost, it may be energy-friendly environment to generate electricity. All waste, in that it can act as a bait for microorganisms, sustainability of the microbial fuel cell is limitless. The latest research on the optimization and performance of the operating parameters are surveyed and through the SSaM-GG(Smart, Shared, and Mutual- Green Growth) or GG-SSaM(Green Growth - Smart, Shared, and Mutual) as the concept of sustainable development in MFC, the middle indices are developed in this study.

Design and Implementation of Linear Gain Equalizer for Microwave band (초고주파용 선형 이득 등화기 설계 및 제작)

  • Kim, Kyoo-Hwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.17 no.11
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    • pp.635-639
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    • 2016
  • In the devices used in the microwave frequency band, the gain decreases as the frequency increases due to the parasitic component. To compensate for these characteristics, a linear gain equalizer with an opposite slope is needed in wideband systems, such as those used for electronic warfare. In this study, a linear gain equalizer that can be used in the 18 ~ 40GHz band is designed and fabricated. Circuit design and momentum design (optimizations) were carried out to reduce the errors between design and manufacturing. A thin film process is used to minimize the parasitic components within the implementation frequency band. A sheet resistance of 100 ohm/square was employed to minimize the wavelength variation due to the length of the thin film resistor. This linear gain equalizer is a structure that combines a quarter wavelength-resonator on a series microstrip line with a resistor. All three 1/4 wavelength short resonators were used. The fabricated linear gain equalizer has a loss of more than -5dB at 40GHz and a 6dB slope in the 18 ~ 40GHz band. By using the manufactured gain equalizer in a multi-stage connected device such as an electronic warfare receiver, the gain flatness degradation with increasing frequency can be reduced.

Influence of the hydrogen post-annealing on the electrical properties of metal/alumina/silicon-nitride/silicon-oxide/silicon capacitors for flash memories

  • Kim, Hee-Dong;An, Ho-Myoung;Seo, Yu-Jeong;Zhang, Yong-Jie;Kim, Tae-Geun
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.122-122
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    • 2008
  • Recently, Metal/Alumina/Silicon-Nitride/Silicon-Oxide/Silicon (MANOS) structures are one of the most attractive candidates to realize vertical scaling of high-density NAND flash memory [1]. However, as ANO layers are miniaturized, negative and positive bias temperature instability (NBTI/PBTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density increase, ${\Delta}D_{it}$, the gate leakage current, ${\Delta}I_G$. and the retention characteristics, in MONOS capacitors, becomes an important issue in terms of reliability. It is well known that tunnel oxide degradation is a result of the oxide and interfacial traps generation during FN (Fowler-Nordheim) stress [2]. Because the bias temperature stress causes an increase of both interfacial-traps and fixed oxide charge could be a factor, witch can degrade device reliability during the program and erase operation. However, few studies on NBTI/PBTI have been conducted on improving the reliability of MONOS devices. In this work, we investigate the effect of post-annealing gas on bias temperature instability (BTI), such as the flat band voltage shift, ${\Delta}V_{FB}$, the interfacial trap density shift, ${\Delta}I_G$ retention characteristics, and the gate leakage current characteristics of MANOS capacitors. MANOS samples annealed at $950^{\circ}C$ for 30 s by a rapid thermal process were treated via additional annealing in a furnace, using annealing gases $N_2$ and $N_2-H_2$ (2 % hydrogen and 98 % nitrogen mixture gases) at $450^{\circ}C$ for 30 min. MANOS samples annealed in $N_2-H_2$ ambient had the lowest flat band voltage shift, ${\Delta}V_{FB}$ = 1.09/0.63 V at the program/erase state, and the good retention characteristics, 123/84 mV/decade at the program/erase state more than the sample annealed at $N_2$ ambient.

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Implementation of Stopping Criterion Algorithm using Variance Values of LLR in Turbo Code (터보부호에서 LLR 분산값을 이용한 반복중단 알고리즘 구현)

  • Jeong Dae-Ho;Kim Hwan-Yong
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.43 no.9 s.351
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    • pp.149-157
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    • 2006
  • Turbo code, a kind of error correction coding technique, has been used in the field of digital mobile communication system. As the number of iterations increases, it can achieves remarkable BER performance over AWGN channel environment. However, if the number of iterations is increased in the several channel environments, any further iteration results in very little improvement, and requires much delay and computation in proportion to the number of iterations. To solve this problems, it is necessary to device an efficient criterion to stop the iteration process and prevent unnecessary delay and computation. In this paper, it proposes an efficient and simple criterion for stopping the iteration process in turbo decoding. By using variance values of LLR in turbo decoder, the proposed algerian can largely reduce the average number of iterations without BER performance degradation in all SNR regions. As a result of simulation, the average number of iterations in the upper SNR region is reduced by about $34.66%{\sim}41.33%$ compared to method using variance values of extrinsic information. the average number of iterations in the lower SNR region is reduced by about $13.93%{\sim}14.45%$ compared to CE algorithm and about $13.23%{\sim}14.26%$ compared to SDR algorithm.

Study on Electrical Characteristics of Ideal Double-Gate Bulk FinFETs (이상적인 이중-게이트 벌크 FinFET의 전기적 특성고찰)

  • Choi, Byung-Kil;Han, Kyoung-Rok;Park, Ki-Heung;Kim, Young-Min;Lee, Jong-Ho
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.11 s.353
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    • pp.1-7
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    • 2006
  • 3-dimensional(3-D) simulations of ideal double-gate bulk FinFET were performed extensively and the electrical characteristics. were analyzed. In 3-D device simulation, we changed gate length($L_g$), height($H_g$), and channel doping concentration($N_b$) to see the behaviors of the threshold voltage($V_{th}$), DIBL(drain induced barrier lowering), and SS(subthreshold swing) with source/drain junction depth($X_{jSDE}$). When the $H_g$ is changed from 30 nm to 45nm, the variation gives a little change in $V_{th}$(less than 20 mV). The DIBL and SS were degraded rapidly as the $X_{jSDE}$ is deeper than $H_g$ at low fin body doping($1{\times}10^{16}cm^{-3}{\sim}1{\times}10^{17}cm^{-3}$). By adopting local doping at ${\sim}10nm$ under the $H_g$, the degradation could be suppressed significantly. The local doping also alleviated $V_{th}$ lowering by the shallower $X_{jSDE}\;than\;H_g$ at low fin body doping.

A Comparison Study of Colour Perception considering Peripheral Vision on Display Device (디스플레이상에서 주변시를 고려한 색채 인지 비교 연구)

  • Hong, Ji-Young;Park, Yun-Sun
    • The Journal of the Institute of Internet, Broadcasting and Communication
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    • v.16 no.1
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    • pp.43-53
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    • 2016
  • In this study, under the assumption that there may be differences in colour attributes that can be perceived according to the brightness of the background and the size of the colour stimulus, a test was conducted where colour matching was done for stimulus sizes of $10^{\circ}$ and $20^{\circ}$ in terms of peripheral vision by varying the background brightness. The test results showed that depending on the background brightness and the specific combinations of the Munsell colour attributes used as the test stimulus, colours can be perceived differently even if they are the same colours. In addition, in contrast to findings from previous studies on colour perception according to the stimulus size, it was found that even if the size of the colour stimulus is relatively small, colours can be perceived more colourfully or more brightly with changes in the background brightness. Based on the findings of this study, degradation in image quality can be improved, which may occur when the size of the input image is changed at a later time, and also, contributions can be made when it comes to the reproduction of effective sold three-dimensional structures that reflect visual qualities when processing 3D holographic imagery, in addition to 2D imagery.

Effects of Vth adjustment ion implantation on Switching Characteristics of MCT(MOS Controlled Thyristor) (문턱전압 조절 이온주입에 따른 MCT (MOS Controlled Thyristor)의 스위칭 특성 연구)

  • Park, Kun-Sik;Cho, Doohyung;Won, Jong-Il;Kwak, Changsub
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.5
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    • pp.69-76
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    • 2016
  • Current driving capability of MCT (MOS Controlled Thyristor) is determined by turn-off capability of conducting current, that is off-FET performance of MCT. On the other hand, having a good turn-on characteristics, including high peak anode current ($I_{peak}$) and rate of change of current (di/dt), is essential for pulsed power system which is one of major application field of MCTs. To satisfy above two requirements, careful control of on/off-FET performance is required. However, triple diffusion and several oxidation processes change surface doping profile and make it hard to control threshold voltage ($V_{th}$) of on/off-FET. In this paper, we have demonstrated the effect of $V_{th}$ adjustment ion implantation on the performance of MCT. The fabricated MCTs (active area = $0.465mm^2$) show forward voltage drop ($V_F$) of 1.25 V at $100A/cm^2$ and Ipeak of 290 A and di/dt of $5.8kA/{\mu}s$ at $V_A=800V$. While these characteristics are unaltered by $V_{th}$ adjustment ion implantation, the turn-off gate voltage is reduced from -3.5 V to -1.6 V for conducting current of $100A/cm^2$ when the $V_{th}$ adjustment ion implantation is carried out. This demonstrates that the current driving capability is enhanced without degradation of forward conduction and turn-on switching characteristics.

The electrical characteristics of flexible organic field effect transistors with flexible multi-stacked hybrid encapsulation

  • Seol, Yeong-Guk;Heo, Uk;Park, Ji-Su;Lee, Nae-Eung;Lee, Deok-Gyu;Kim, Yun-Je;An, Cheol-Hyeon;Jo, Hyeong-Gyun
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.08a
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    • pp.176-176
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    • 2010
  • One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio (Ion/Ioff), leakage current, threshold voltage, and hysteresis under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stability of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers was investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic-layer-deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to 105 times with 5mm bending radius. In the most of the devices after 105 times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the Ion/Ioff and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

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