The process optimization of in-situ H$_2$ bake and GeH$_4$ clean in low temperature Si epitaxy using design of experiment
(저온 Si계 에피 성장기술에서 실험계획법에 의한 in-situ H$_2$ bake 및 GeH$_4$ clean 공정 최적화)
-
- Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
- /
- 1994.11a
- /
- pp.54-58
- /
- 1994
-