• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.5
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• pp.1023-1028
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• 2012

A MMIC (Monolithic Microwave Integrated Circuit) mixer chip using the Schottky diode of an GaAs p-HEMT process has been developed for the I/Q demodulator of non-contact near field microwave probing system. A single balanced mixer type is adopted to achieve simple structure of the I/Q demodulator. A quadrature hybrid coupler and a quarter wavelength transmission line for 180 degree hybrid are realized with lumped elements of MIM capacitor and spiral inductor to reduce the mixer chip size. According to the on-wafer measurement, this MMIC mixer covers RF and LO frequencies of 1650MHz to 2050MHz with flat conversion loss. The MMIC mixer with miniature size of $2.5mm{\times}1.7mm$ demonstrates conversion loss below 12dB for both variations of RF and LO frequencies, LO-to-IF isolation above 43dB and RF-to-IF isolation above 23dB, respectively.

• Journal of Communications and Networks
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• v.10 no.1
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• pp.44-54
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• 2008

In this paper, an iterative multiple symbol differential detection for turbo coded differential unitary space-time modulation using a posteriori probability (APP) demodulator is investigated. Two approaches of different complexity based on linear prediction are presented to utilize the temporal correlation of fading for the APP demodulator. The first approach intends to take account of all possible previous symbols for linear prediction, thus requiring an increase of the number of trellis states of the APP demodulator. In contrast, the second approach applies Viterbi algorithm to assist the APP demodulator in estimating the previous symbols, hence allowing much reduced decoding complexity. These two approaches are found to provide a trade-off between performance and complexity. It is shown through simulation that both approaches can offer significant BER performance improvement over the conventional differential detection under both correlated slow and fast Rayleigh flat-fading channels. In addition, when comparing the first approach to a modified bit-interleaved turbo coded differential space-time modulation counterpart of comparable decoding complexity, the proposed decoding structure can offer performance gain over 3 dB at BER of $10^{-5}$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.26 no.11B
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• pp.1565-1573
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• 2001

In order to resolve problems according to the phase error in QPSK demodulator in the digital satellite broadcasting, the demodulator requires carrier recovery loop which searches for the frequency and phase of the carrier. In this paper the drawback of NCO of the conventional carrier recovery loop is to wastes a amount of power for the structure of Look-up table , we designed the structure of combinational logic without the Look-up table. In the comparison with dynamic power of the proposed NCO, the power of NCO with the Look-up table is 175[${\mu}$W], NCO with the proposed structure is 24.65[${\mu}$W]. As the result, it is recognized that loss power is reduced about one eighth. In the simulation of carrier recovery loop designed QPSK demodulator, it is known that the carrier phase is compensated.

• Korean Journal of Optics and Photonics
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• v.12 no.5
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• pp.371-375
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• 2001

We have implemented a sensor head which consists of erbium doped fiber pumped by 1480 nm LD and single fiber Bragg grating for simultaneous measurement of strain and temperature. The measurement precision and speed are improved by using Mach-Zehnder interferometer instead of optical spectrum analyzer (OSA) as a demodulator. The measurement precision of temperature measured by the amplitude variation of output signal is 0.05$^{\circ}C$ and that of strain measured by the phase variation of output signal is 0.1$\mu$strain. The measurement precision of temperature and strain are improved nearly 140 times and 700 times, respectively, compared to those using an OSA with wavelength resolution of 0.97 nm as d demodulator.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.10 no.2
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• pp.77-83
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• 2011

In this paper, we present the design procedure of the synchronizer and the demodulator of a 13.56MHz RFID PJM tag, which was standardized in ISO 18000-3 mode 3. We optimize the algorithms in order to minimize the number of registers and implement them based on international standard. The designed module is simulated by Modelsim and FPGA. The synchronizer is composed of 3 correlators that is implemented by 1,024(16bit ${\times}$ 64cycle) registers. The demodulator is composed of 2 correlators that is implemented by 128(2bit ${\times}$ 64cycle) registers. The simulation performed with the demodulator integrated with the synchronizer shows that it works at about 87% success rate with the test data of SNR -2dB and 100% with those of SNR 4dB.

• Journal of Korea Society of Industrial Information Systems
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• v.8 no.1
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• pp.83-91
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• 2003

High-speed QPSK demodulator has been in important design objective of any wireless communication systems, especially those offering broadband multimedia service. This paper describes all-digital QPSK demodulator for high-speed wireless communications, and its hardware structures are discussed. All-digital QPSK demodulator is mainly composed of symbol time circuit and carrier recovery circuit to estimate timing and phase-offsets. There are various schemes. Among them, we use Gardner algorithm and Decision-Directed carrier recovery algorithm which is most efficient scheme to warrant the fast acquisition and tacking to fabricate FPGA chip. The testing results of the implemented onto CPLD-EPF10K100GC 503-4 chip show demodulation speed is reached up to 2.6[Mbps]. If it is implemented a CPLD chip with speed grade 1, the demodulation speed can be faster by about 5 times. Actually in case of designing by ASIC, its speed my be faster than CPLD by 5 times. Therefore, it is possible to fabricate the all-digital QPSK demodulator chipset with speed of 50[Mbps].

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.12
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• pp.1248-1255
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• 2003

High-speed QPSK demodulator has been one important design objective of any wireless communication systems, especially those offering broadband multimedia service. This paper describes Zero-Crossing IF-level(ZCIF) QPSK demodulator for high-speed wireless communications, and its hardware structures are discussed. ZCIF QPSK demodulator is mainly composed of symbol time circuit and carrier recovery circuit to estimate timing and phase-offsets. There are various schemes. Among them, we use Gardner algorithm and Decision-Directed carrier recovery algorithm which is most efficient scheme to warrant the fast acquisition and tracking to fabricate FPGA chip. The testing results of the implemented onto CPLD-FLEX10K chip show demodulation speed is reached up to 2.6［Mbps］. Actually in case of designing by ASIC, its speed may be faster than CPLD by 5 times. Therefore, it is possible to fabricate the ZCIF QPSK demodulator with speed of 10 Mbps.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.229-237
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• 2011

In this paper, a 60 GHz LTCC SiP with low-power CMOS OOK modulator and demodulator is presented. The 60 GHz modulator is designed in a 90-nm CMOS process. The modulator uses a current reuse technique and only consumes 14.4-mW of DC power in the on-state. The measured data rate is up to 2 Gb/s. The 60 GHz OOK demodulator is designed in a 130nm CMOS process. The demodulator consists of a gain boosting detector and a baseband amplifier, and it recovers up to 5 Gb/s while consuming low DC power of 14.7 mW. The fabricated 60 GHz modulator and demodulator are fully integrated in an LTCC SiP with 1 by 2 patch antenna. With the LTCC SiP, 648 Mb/s wireless video transmission was successfully demonstrated at wireless distance of 20-cm.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2000.05a
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• pp.226-230
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• 2000

In this paper, we implemented the QPSK demodulator with a CPLD chip, and examined the results. DD(Decision Directed)-Gardner algorithm is used for STR loop and Decision-Directed algorithm is used for CPR loop. The speed of the QPSK demodulator implemented in FLEX10K chip can be guaranteed approximately 2[Mbpsl] transmission speed. In practical designed by ASIC, the speed is faster than that of CPLD by 5-6 times.

• Proceedings of the Korean Society For Composite Materials Conference
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• 2005.11a
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• pp.185-189
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• 2005

For the simultaneous measurement of strain and vibration signal, a fiber Bragg grating sensor system with a dual demodulator was proposed. One demodulator using a tunable Fabry-Perot filter could measure low-frequency signal such as strain and the other demodulator using a coarse wavelength division multiplexer could detect high-frequency signal such as vibration signal using intensity demodulation method. In order to measure strain and vibration of the composite main wing model under static loading a real time monitoring program was developed. Also using intensity demodulation of CWDM, sensitivity and resolution at high frequency vibration were evaluated.