• Title/Summary/Keyword: demodulator

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Design of Analog Circuits for 13.56MHz RFID Tags (13.56MHz RFID Tag용 아날로그 회로 설계)

  • Kim, Kyung-Hwan;Han, Sang-Soo;On, Sung-Hoon;Park, Ji-Man;Yu, Chong-Gun
    • Proceedings of the KIEE Conference
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    • 2006.10c
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    • pp.166-168
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    • 2006
  • An analog front-end circuit for 13.56MHz ISO/IECl4443 type B compatible RFID tags was designed. The designed circuit includes a rectifier and regulator to generate a stable DC voltage from the RF signal, an over-voltage limiter to protect the circuit from high voltages, an ASK demodulator to extract the data transferred from reader to tag, and a load modulator to transfer data from tag to reader. The functionality of the designed circuit has been verified through simulations using 0.25um CMOS process parameters.

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The Hardware Design for GPS Data Acquisition Circuit (GPS 데이타 수신을 위한 하드웨어 설계)

  • 정영태;김민호;김명돈;홍성일;변건식;정만영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.32A no.10
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    • pp.8-17
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    • 1995
  • Recently, in a variety of the application fields, it is interested in GPS receiver as the use of GPS(Global Positioning System) is increased. In this paer, we propose that a type of new receiver of a simple structure as GPS data receiver. This proposed receiver consists of RF stage, local C/A(Coarse/Acquisition) code generator, C/A code correlator, data demodulator and microprocessor controller as a GPS single channel data receiver using the L1 carrier . It is confirmed that the proposed receiver operates well as GPS raw data receiver through experiment.

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QPSK Modem Design of Satellite Air-defence Warning System (위성 전군방공경보체계 QPSK 모뎀 설계)

  • Kim, Younghun
    • Journal of the Korea Institute of Military Science and Technology
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    • v.18 no.6
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    • pp.755-761
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    • 2015
  • Satellite Air-defence Warning System receives the aircraft/ballistic track information and air defense control command obtained from Master Control & Reporting Center (MCRC) and Air Missile Defence Cell (AMD Cell) Systems. It consists of terminal and control system to propagate track information and air defense control command control via the military satellite communications. In this paper, there were described track information, air defense control command, the frame structure of modem to transmit a voice information and modulation/demodulator design, network synchronization methods via the satellite network.

Implementation of a Linearized Power Amplifier using a Adaptive Digital Predistorter (적응 디지틀 전치왜곡기를 이용한 선형화된 전력증폭기의 구현)

  • 류봉렬;정창규;김남수;박한규
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.31A no.12
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    • pp.9-15
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    • 1994
  • In this paper, the linearized power amplifier using digital adaptive predistorter is implemented in order to restrict spectral spreading and adjacent channel interference. The linearized systems is composed of a DSP56001 processor that executes predistortion in baseband. 90.deg. phase shifter, power splitter/combiner, quadrature modulator/demodulator of 360MHz band, and nonlinear amplifier. A ${\pi}$/4-shift QPSK is used to modulate digital random signals. As the quantized power of baseband signal and the output of amplifier are fed to the predistorter, and predistorting values are calculated using an adaptive algorithm. In the experiment, a peak to sidelobe ratio of the linearized amplifier is improved up to 15dB in comparison with conventional nonlinear amplifier, which means that the distortion of transmitted signal is decreased and adjacent channel interference was reduced.

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Successive Interference Cancellation for the Uplink of MC-CDMA Systems with Multiple Receive Antennas

  • Kong, Hyung-Yun
    • Journal of electromagnetic engineering and science
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    • v.9 no.2
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    • pp.61-65
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    • 2009
  • Successive interference cancellation(SIC) for the uplink of MC-CDMA mobile communications systems is an effective method to improve performance. We propose a successive interference cancellation(SIC) technique for the uplink of MC-CDMA mobile systems with multiple receive antennas. The destination uses optimum combining(OC) to combine the signals from an OFDM Demodulator with multiple receiving antennas, and applies SIC processing to the combined signals. Achieved interference cancellation order is depends on the signal to interference-plus-noise ratio (SINR) at the output of the optimum combiner. Monte-Carlo simulations are employed to verify the proposed technique.

DSP Implementation of the Adaptive BPSK demodulator for Underwater acoustic communication (수중 초음파 통신을 위한 적응형 BPSK 복조기의 DSP 구현)

  • Jeon, Jae-Kuk;Park, Chan-Sub;Joo, Hyung-Jun;Kim, Ki-Man
    • Proceedings of the Korean Society of Marine Engineers Conference
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    • 2006.06a
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    • pp.109-110
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    • 2006
  • The performance of a digital baseband signal processing and data transmission rate depends on the modulation technique. In this paper, We implemented DSP communication system for Underwater acoustic communication using by adaptive BPSK modem technique. In order to implement adaptive modem, we suggested SNR detection block. SNR detection block has the reference SNR value that selects between window filter path and matched filter path. In this paper, suggested system is based on software interface and all Hardware(PLL, modem filter, equalizer etc) is implemented by software, exclusive of DSP, A/D, D/A converter, SDRAM and Flash memory.

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The Low-Area of New arc-tangent Look-up Table and A Low-Overhead for CATV Modem Systems

  • Ban, Young-Hoon;Park, Jong-Woo;Cho, Byung-Lok;Song, Jai-Chul
    • Proceedings of the IEEK Conference
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    • 1999.06a
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    • pp.857-860
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    • 1999
  • It is made possible a removal of the preamble for carrier recovery and symbol-timing recovery by storing a burst in memory with low overhead QPSK demodulation and this demodulation method also effects frame efficiency improved by processed synchronization performance. In this paper, we have proposed that new algorithm for arc-tangent look-up table which transform the input I, Q data by phase. This I, Q data plays an important role in demodulation and makes demodulator with low-overhead by storing a burst in memory. To evaluate proposed new algorithm and symbol-timing recovery method, function simulation and timing verification have been done by using synopsys VHDL tool.

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A Visible Light Communication Repeater Using an LED Lamp (LED 조명등을 이용한 가시광통신 중계기)

  • Lee, Seong-Ho
    • Journal of Sensor Science and Technology
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    • v.25 no.3
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    • pp.189-195
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    • 2016
  • In this paper, we newly introduce a visible light communication (VLC) repeater using the LED array in an LED lamp. The LED array is used for a light source in the repeater, which radiates light both for illumination and data transmission. A VLC repeater is made by adding some electronic circuits to the LED array including a photodetector, a demodulator, and a modulator. The repeater is installed on the ceiling of a room like a conventional LED lamp, receives the VLC signal from an arbitrary transmitter, recovers data, and radiates the signal to wide area in the room. We used a carrier frequency of 100 kHz for the uplink from a transmitter to the repeater, and 500 kHz for the downlink from the repeater to a receiver. The repeater is useful for increasing the transmission path to wide area over the obstacles that may exist between VLC transmitters and receivers.

A Study on Implementation and Performance Measurement of a Short Distance Wireless Transceiver System with Microprocessor (마이크로프로세서를 이용한 근거리 무선 송수신 시스템의 구현과 성능측정에 관한 연구)

  • 차용성;강병권
    • Proceedings of the IEEK Conference
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    • 2001.06a
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    • pp.305-308
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    • 2001
  • In this paper, we realized a transceiver system for short distance communication with a commercial RF module working in ISM band and a microprocessor. Also we measured system performance by transmitting baseband data in a building and then we compared the demodulated 긴ta bits with stored data bits in a PC connected with demodulator. The RF module in the experiments works oかy in the bandwidth, 424MHz - 429MHz. with FM mode. The signal level degrades as the distance between transmitter and receiver increases we measured the signal level and bit error in the building of engineering college of our university. we present the measured data with various locations in the building. and the data may be used in design short distance network in a building.

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Design and Fabrication of the System in Package for the Digital Broadcasting Receiver (디지털 방송 수신용 System in Package 설계 및 제작)

  • Kim, Jee-Gyun;Lee, Heon-Yong
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.1
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    • pp.107-112
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    • 2009
  • This paper describes design and fabrication issues of the SiP(System in Package) one-chip for a portable digital broadcasting receiver. It includes RF tuner chip, demodulator chip and passive components for the receiver system. When we apply the SiP one-chip technology to the broadcasting receiver, the system board size can be reduced from $776mm^2$ to $144mm^2$. SiP one-chip has an advantage that the area reduces more 81% than separated chips. Also the sensitivity performance advances -1dBm about 36 channels in the RF weak electric field, the power consumption reduces about 2mW and the C/N keeps on the same level.