• 전기전자학회논문지
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• 제26권2호
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• pp.306-312
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• 2022

서로 다른 PN 비율과 금속화 어닐링 온도에 의해 장벽 높이가 다른 4H-SiC 병합 PiN Schottky(MPS) 다이오드의 전기적 특성과 심층 트랩을 조사했다. MPS 다이오드의 장벽 높이는 IV 및 CV 특성에서 얻었다. 전위장벽 높이가 낮아짐에 따라 누설 전류가 증가하여 10배의 전류가 발생하였다. 또한, 심층 트랩(Z_1/2 및 RD_1/2)은 4개의 MPS 다이오드에서 DLTS 측정을 통해 밝혀졌다. DLTS 결과를 기반으로, 트랩 에너지 준위는 낮은 장벽 높이와 함께 22~28%의 얕은 수준으로 확인되었다. 이는 쇼트키 장벽 높이에 대해 DLTS에 의해 결정된 결함 수준 및 농도의 의존성을 확인할 수 있다.

• 한국재료학회지
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• 제9권1호
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• pp.104-107
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• 1999

Fe 강제오염된 p-Si에서 여러 가지 quenching 조건에 기인한 에너지 준위들을 deep level transient spectroscopy(DLTS)를 이용하여 측정하였으며, 또한 선택 에칭방법/Optical microscope을 이용한 BMD(bulk micro-defeat)측정을 통하여 Fe 침전물 형서에, Fe 확산을 위한 어닐링 후 Cooling 조건이 미치는 영향을 분석하였다. Cooling 조건들이 여러 종류의 hole trap과 bulk micro-defeat(BMD)형성에 영햐을 주는 것으로 나타났으며, normal cooling의 경우 $\textrm{Fe}_{i}$, 또는 Fe-O complex 와 관계있는 $\textrm{T}_{1},\;\textrm{T}_{2},\;\textrm{T}_{3},\;\textrm{T}_{4}$ trap이 나타났으며, Slow Cooling 의 영향으로 인하여 활성화 에너지가 0.4eV에 해당하는 trap들이 관찰되었다. 또한 $\textrm{Fe}^{+}\textrm{}^{-}$ pair(H4: 0.56eV)는 $\textrm{LN}_{2}$ quenching한 경우에서만 나타났다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2013년도 제44회 동계 정기학술대회 초록집
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• pp.421-422
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• 2013

Recently, ZnO has received attentionbecause of its applications in optoelectronics and spintronics. In order to investigate deep level defects in ZnO, we used N-doped ZnO with various of the N-doping concentration. which are reference samples (undoped ZnO), 27%, 49%, and 88%-doped ZnO. Photoinduced current transient spectroscopy (PICTS) measurement was carried out to find deep level traps in high resistive ZnO:N. In reference ZnO sample, a deep trap was found to located at 0.31 (as denoted as the CO trap) eV below conduction band edge. And the CN1 and CN2 traps were located at 0.09, at 0.17 eV below conduction band edge, respectively. In the case of both annealed samples at 200 and $300^{\circ}C$, the defect density of the CO trap increases and then decreases with an increase of N-doping concentration. On the other hands, the density of CN traps has little change according to an increase of N-doping concentration in the annealed sample at $300^{\circ}C$. According to the result of PICTS measurement for different N-doping concentration, we suggest that the CO trap could be controled by N-doping and the CN traps be stabilized by thermal annealing at $300^{\circ}C$.

• JSTS:Journal of Semiconductor Technology and Science
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• 제6권3호
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• pp.210-224
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• 2006

A new analytical model for the static I-V characteristics of GaAs MESFET’s under optically controlled conditions in both linear and saturation region is presented in this paper. The novelty of the model lies in characterizing both photovoltaic (external, internal) and photoconductive effects. Deep level traps in the semi insulating GaAs substrate are also included in this model. Finally, effect of backgate voltage on I-V characteristics is explained analytically for the first time in literature. Small signal parameters of GaAs MESFET are derived under both dark and illuminated conditions. Some of the results are compared with reported experimental results to show the validity of the proposed model. Since accurate dc modeling is the key to accurate ac modeling, this model is very useful in the designing of photonic MMIC’s and OEIC’s using GaAs MESFET.

• E2M - 전기 전자와 첨단 소재
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• 제7권5호
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• pp.383-388
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• 1994

Deep levels in semi-insulating GaAs were observed by thermally stimulated current(TSC) measurement In the temperature ranges of 100-300K Tl(E$\_$c/-0.18eV), T2(E$\_$c/-0.20eV), T3(E$\_$c/-0.31eV), T4(E$\_$c/-0.40eV), and T5(E$\_$c/-O.43eV) traps have been observed. The TI, T2, and T5 traps seem to be related to the V$\_$As/, V$\_$Ga/-complex, and As$\_$Ga/$\^$++/ respectively. T4 trap is considered with respect to V$\_$Ga/-V$\_$As/ complex.

• E2M - 전기 전자와 첨단 소재
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• 제10권8호
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• pp.800-806
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• 1997

The behavior of de levels in rapid thermal annealed Fe-doped semi-insulating InP(100) was studied by photoinduced current transient spectrocopy(PICTS). In bulk InP, T2(Ec-0.24 eV), T3(Ec-0.30 eV) and T5(Ec-0.62 eV) traps were observed. After annealing the T2 trap was annihilated at 20$0^{\circ}C$ and recreated at 35$0^{\circ}C$. T3 trap was not affected below 40$0^{\circ}C$. With increasing temperature the concentration of T5 trap reduced and it was annihilated at 30$0^{\circ}C$. However the T1(Ec-0.16 eV) and T4(Ec-0.42 eV) traps were began to appear at 40$0^{\circ}C$and these concentrations were increased with annealing temperature. The T1 and T4 traps seem to be related to the isolated phosphorus vacancy( $V_{p}$) and $V_{p}$-indium antisite( $V_{p}$- $P_{in}$ ) or $V_{p}$-indium interstitial( $V_{p}$-I $n_{I}$) respectiely.respectiely.

• 대한전자공학회논문지
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• 제25권11호
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• pp.1294-1303
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• 1988

광 유도 전류 천이 (photo-induced current transient)방법으로 측정한 SI GaAs의 전자와 정공 trap이 갖을 수 있는 activation energy({\Delta}E_r)의 범위는 0.16$\pm$ 0.01eV에서 0.98$\pm$ 0.01eV까지 분포되어 있다. SI Undoped GaAs가 SI GaAs : Cr 보다 깊은 준위의 수가 적음을 확인 하였다. Trap의 열적인 capture cross section과 농도를 평가 하였고, 약간의 trap은 SI GaAs 성장시에 발생될 수 있는 결함과 관련되어 있음을 확인하였다. 특히 SI GaAs에서 보상 level로 작용하는 Cr과 “0” level를 좀 더 정확하게 측정하기 위하여 서로 다른 측정방법을 사용하여 측정한 결과를 각기 비교 검토 하였다. 즉, PICT측정, 상온 이상의 온도에서 측정한 Hall data 및 광전류 spectra data 등을 비교 검토 하였으며, 보상 level은 격자 결합이 매우 약함을 확인할 수 있었다. Hall data를 computer로 분석한 결과 중성 불순물 scattering이 측정 온도 범위에서 매우 중요한 역할을 하고 있음을 알 수 있었다.

• 한국재료학회지
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• 제9권5호
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• pp.460-466
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• 1999

The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

• E2M - 전기 전자와 첨단 소재
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• 제7권3호
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• pp.213-219
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• 1994

Cu compensated Si doped GaAs (GaAs :Si:Cu has been chosen as the switch material. The GaAs material has been characterized by DLTS(Deep Level Transient Spectroscopy) technique and the obtained data were used in the computer simulation. Simulation studies are performed on several GaAs switch systems, composed of different densities of Cu, to investigate the influence of deep traps in the switch systems. The computed results demonstrates important aspect of the switch, the existence of two stable states and fast optical quenching. An important parameter optimum Cu density for the switch are also determined.

• E2M - 전기 전자와 첨단 소재
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• 제9권7호
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• pp.719-726
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• 1996

DLTS measurements were performed to study the annealing induced changes of the trap centers in MOV and to shed more light on the stability mechanism of the MOV. Two electron traps, Ec-0.26[eV] and Ec-(O.2-0.3)[eV], were observed in the unannealed samples in large quantities(7-9 X 1014[CM 3]), whereas the three electron traps Ec-0.17 [eV], Ec-0.26[eV] and Ec-(O.2-0.3)[eV] were observed far less in the annealed samples. The minima in the Ec-0.26[eV] trap density, coupled with the presented results that unannealed devices are unstable whereas 600.deg. C annealed devices are most stable, suggests that the instability of the MOV under long term electrical stressing is related to the Ec-0.26[eV] trap. This results support that the ion migration model for the device instability where the Ec-0.26[eV] defects may be the interstitial zinc or the migrating ions. The interstitial zinc originated as a result of the nonstoichiometric nature of ZnO might cause the degradation of the I-V characteristics of the MOV with long term electrical stressing.