• Title/Summary/Keyword: deep level traps

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Electrical Characteristics and Deep Level Traps of 4H-SiC MPS Diodes with Different Barrier Heights (전위 장벽에 따른 4H-SiC MPS 소자의 전기적 특성과 깊은 준위 결함)

  • Byun, Dong-Wook;Lee, Hyung-Jin;Lee, Hee-Jae;Lee, Geon-Hee;Shin, Myeong-Cheol;Koo, Sang-Mo
    • Journal of IKEEE
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    • v.26 no.2
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    • pp.306-312
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    • 2022
  • We investigated electrical properties and deep level traps in 4H-SiC merged PiN Schottky (MPS) diodes with different barrier heights by different PN ratios and metallization annealing temperatures. The barrier heights of MPS diodes were obtained in IV and CV characteristics. The leakage current increased with the lowering barrier height, resulting in 10 times larger current. Additionally, the deep level traps (Z1/2 and RD1/2) were revealed by deep level transient spectroscopy (DLTS) measurement in four MPS diodes. Based on DLTS results, the trap energy levels were found to be shallow level by 22~28% with lower barrier height It could confirm the dependence of the defect level and concentration determined by DLTS on the Schottky barrier height and may lead to incorrect results regarding deep level trap parameters with small barrier heights.

The Study of Deep Level Behaviors in Si Contaminated by Iron (Fe 오염에 따른 Si내의 deep level거동에 관한 연구)

  • Mun, Yeong-Hui;Kim, Jong-O
    • Korean Journal of Materials Research
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    • v.9 no.1
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    • pp.104-107
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    • 1999
  • We investigated the effects of cooling condition on deep levels and iron precipitate formation in iron-contaminated p-type silicon by DLTS(Deep Level Transient Spectroscopy) and preferential etching technique. Dependency of cooling condition on Bulk Micro-Defect (BMD) and four different iron-related deep traps were observed. For normal cooling condition, T1, T2, T3, T4 traps that related to Fe\ulcorner or Fe-O complex were obtained. However, the trap with activation energy, 0.4 eV was observed for slow cooling condition. The trap caused by the $\textrm{Fe}^{+}\textrm{}^{-}$ pair (H4:0.56eV) were detected only at the case of $\textrm{LN}_{2}$ quenching condition.

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Deep-Level Defects on Nitrogen-Doped ZnO by Photoinduced Current Transient Spectroscopy

  • Choi, Hyun Yul;Seo, Dong Hyeok;Kwak, Dong Wook;Kim, Min Soo;Kim, Yu Kyeong;Lee, Ho Jae;Song, Dong Hun;Kim, Jae Hee;Lee, Jae Sun;Lee, Sung Ho;Yoon, Deuk Gong;Bae, Jin Sun;Cho, Hoon Young
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.421-422
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    • 2013
  • Recently, ZnO has received attentionbecause of its applications in optoelectronics and spintronics. In order to investigate deep level defects in ZnO, we used N-doped ZnO with various of the N-doping concentration. which are reference samples (undoped ZnO), 27%, 49%, and 88%-doped ZnO. Photoinduced current transient spectroscopy (PICTS) measurement was carried out to find deep level traps in high resistive ZnO:N. In reference ZnO sample, a deep trap was found to located at 0.31 (as denoted as the CO trap) eV below conduction band edge. And the CN1 and CN2 traps were located at 0.09, at 0.17 eV below conduction band edge, respectively. In the case of both annealed samples at 200 and $300^{\circ}C$, the defect density of the CO trap increases and then decreases with an increase of N-doping concentration. On the other hands, the density of CN traps has little change according to an increase of N-doping concentration in the annealed sample at $300^{\circ}C$. According to the result of PICTS measurement for different N-doping concentration, we suggest that the CO trap could be controled by N-doping and the CN traps be stabilized by thermal annealing at $300^{\circ}C$.

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Static I-V Characteristics of Optically Controlled GaAs MESFET's with Emphasis on Substrate-induced Effects

  • Murty, Neti V.L. Narasimha;Jit, S.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.6 no.3
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    • pp.210-224
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    • 2006
  • A new analytical model for the static I-V characteristics of GaAs MESFET’s under optically controlled conditions in both linear and saturation region is presented in this paper. The novelty of the model lies in characterizing both photovoltaic (external, internal) and photoconductive effects. Deep level traps in the semi insulating GaAs substrate are also included in this model. Finally, effect of backgate voltage on I-V characteristics is explained analytically for the first time in literature. Small signal parameters of GaAs MESFET are derived under both dark and illuminated conditions. Some of the results are compared with reported experimental results to show the validity of the proposed model. Since accurate dc modeling is the key to accurate ac modeling, this model is very useful in the designing of photonic MMIC’s and OEIC’s using GaAs MESFET.

A study on thermally stimulatede current in semi-insulating GaAs (반절연성 GaAs에서 열자극 전류에 관한 연구)

  • 배인호;김기홍;김인수;최현태;이철욱;이정열
    • Electrical & Electronic Materials
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    • v.7 no.5
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    • pp.383-388
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    • 1994
  • Deep levels in semi-insulating GaAs were observed by thermally stimulated current(TSC) measurement In the temperature ranges of 100-300K Tl(E$\_$c/-0.18eV), T2(E$\_$c/-0.20eV), T3(E$\_$c/-0.31eV), T4(E$\_$c/-0.40eV), and T5(E$\_$c/-O.43eV) traps have been observed. The TI, T2, and T5 traps seem to be related to the V$\_$As/, V$\_$Ga/-complex, and As$\_$Ga/$\^$++/ respectively. T4 trap is considered with respect to V$\_$Ga/-V$\_$As/ complex.

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A Study on Deep Levels in Rapid Thermal Annealed PICTS Semi-Insulating InP(100) by PICTS (PICTS 방법에 의한 급속열처리시킨 반절연성 InP(100)에서 깊은준위에 관한 연구)

  • 김종수;김인수;이철욱;이정열;배인호
    • Electrical & Electronic Materials
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    • v.10 no.8
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    • pp.800-806
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    • 1997
  • The behavior of de levels in rapid thermal annealed Fe-doped semi-insulating InP(100) was studied by photoinduced current transient spectrocopy(PICTS). In bulk InP, T2(Ec-0.24 eV), T3(Ec-0.30 eV) and T5(Ec-0.62 eV) traps were observed. After annealing the T2 trap was annihilated at 20$0^{\circ}C$ and recreated at 35$0^{\circ}C$. T3 trap was not affected below 40$0^{\circ}C$. With increasing temperature the concentration of T5 trap reduced and it was annihilated at 30$0^{\circ}C$. However the T1(Ec-0.16 eV) and T4(Ec-0.42 eV) traps were began to appear at 40$0^{\circ}C$and these concentrations were increased with annealing temperature. The T1 and T4 traps seem to be related to the isolated phosphorus vacancy( $V_{p}$) and $V_{p}$-indium antisite( $V_{p}$- $P_{in}$ ) or $V_{p}$-indium interstitial( $V_{p}$-I $n_{I}$) respectiely.respectiely.

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Deep Levels in Semi-Insulating GaAs : Cr and Undoped GaAs (SI GaAs : Cr과 Undoped GaAs의 깊은 준위)

  • Rhee, Jin-Koo
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.25 no.11
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    • pp.1294-1303
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    • 1988
  • Electron and hole traps in semi-insulating GaAs with activation energies ({\Delta}E_r) ranging from 0.16 $\pm$ 0.01 to 0.98 $\pm$ 0.01 eV, have been detected and characterized by photo-induced current transient measurements. SI undoped GaAs has fewer deep levels than SI GaAs: Cr. The thermal capture cross section and density of the traps have been estimated and some of the centers have been related to native defects. In particular, the activation energy of the compensating Cr, and "0" levels in semi-insulating GaAs were accurately measured. The transient measurements were complemented by Hall measurements at T > 300K and photocurrent spectra measurements. The transition energies for the deep compensating levels obtained by the analyses of data from these measurements, when compared with those from the transient measurements, indicate negligible lattice-coupling of these centers. Analysis of the transport data also indicates that neutral impurity scattering plays a significant role in semi-insulating materials at high temperatures.

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Physical Characterization of GaAs/$\textrm{Al}_{x}\textrm{Ga}_{1-x}\textrm{As}$/GaAs Heterostructures by Deep Level transient Spectroscopy (DLTS 방법에 의한 GaAs/$\textrm{Al}_{x}\textrm{Ga}_{1-x}\textrm{As}$/GaAs 이종구조의 물성분석에 관한 연구)

  • Lee, Won-Seop;Choe, Gwang-Su
    • Korean Journal of Materials Research
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    • v.9 no.5
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    • pp.460-466
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    • 1999
  • The deep level electron traps in AP-MOCVD GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures have been investigated by means of Deep Level Transient Spectroscopy DLTS). In terms of the experimental procedure, GaAs/undoped Al\ulcornerGa\ulcornerAs/n-type GaAs heterostructures were deposited on 2" undoped semi-insulating GaAs wafers by the AP-MOCVD method at $650^{\circ}C$ with TMGa, AsH3, TMAl, and SiH4 gases. The n-type GaAs conduction layers were doped with Si to the target concentration of about 2$\times$10\ulcornercm\ulcorner. The Al content was targeted to x=0.5 and the thicknesses of Al\ulcornerGa\ulcornerAs layers were targeted from 0 to 40 nm. In order to investigate the electrical characteristics, an array of Schottky diodes was built on the heterostructures by the lift-off process and Al thermal evaporation. Among the key results of this experiment, the deep level electron traps at 0.742~0.777 eV and 0.359~0.680 eV were observed in the heterostructures; however, only a 0.787 eV level was detected in n-type GaAs samples without the Al\ulcornerGa\ulcornerAs overlayer. It may be concluded that the 0.787 eV level is an EL2 level and that the 0.742~0.777 eV levels are related to EL2 and residual oxygen impurities which are usually found in MOCVD GaAs and Al\ulcornerGa\ulcornerAs materials grown at $630~660^{\circ}C$. The 0.359~0.680 eV levels may be due to the defects related with the al-O complex and residual Si impurities which are also usually known to exist in the MOCVD materials. Particularly, as the Si doping concentration in the n-type GaAs layer increased, the electron trap concentrations in the heterostructure materials and the magnitude of the C-V hysteresis in the Schottky diodes also increased, indicating that all are intimately related.ated.

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Effects of Cu impurity on the switching characteristics of the optically controlled bistable semiconductor switches (광제어 쌍안정 반도체 스위치에서 구리 불순물이 스위치특성에 미치는 영향)

  • 고성택
    • Electrical & Electronic Materials
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    • v.7 no.3
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    • pp.213-219
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    • 1994
  • Cu compensated Si doped GaAs (GaAs :Si:Cu has been chosen as the switch material. The GaAs material has been characterized by DLTS(Deep Level Transient Spectroscopy) technique and the obtained data were used in the computer simulation. Simulation studies are performed on several GaAs switch systems, composed of different densities of Cu, to investigate the influence of deep traps in the switch systems. The computed results demonstrates important aspect of the switch, the existence of two stable states and fast optical quenching. An important parameter optimum Cu density for the switch are also determined.

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A study on the degradation of the AC stressed MOV by using of the DLTS technique (DLTS기법에 의한 MOV소자의 교류과전경시 변화특성에 관한 연구)

  • 이동희
    • Electrical & Electronic Materials
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    • v.9 no.7
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    • pp.719-726
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    • 1996
  • DLTS measurements were performed to study the annealing induced changes of the trap centers in MOV and to shed more light on the stability mechanism of the MOV. Two electron traps, Ec-0.26[eV] and Ec-(O.2-0.3)[eV], were observed in the unannealed samples in large quantities(7-9 X 1014[CM 3]), whereas the three electron traps Ec-0.17 [eV], Ec-0.26[eV] and Ec-(O.2-0.3)[eV] were observed far less in the annealed samples. The minima in the Ec-0.26[eV] trap density, coupled with the presented results that unannealed devices are unstable whereas 600.deg. C annealed devices are most stable, suggests that the instability of the MOV under long term electrical stressing is related to the Ec-0.26[eV] trap. This results support that the ion migration model for the device instability where the Ec-0.26[eV] defects may be the interstitial zinc or the migrating ions. The interstitial zinc originated as a result of the nonstoichiometric nature of ZnO might cause the degradation of the I-V characteristics of the MOV with long term electrical stressing.

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