• 융합보안논문지
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• 제8권3호
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• pp.57-64
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• 2008

컴퓨터성능의 향상과 인터넷의 발달로 인하여 디지털 이미지의 보안에 대한 중요성이 계속 증가 하고 있고, 이런 현상때문에 혼돈신호를 이용한 암호화 알고리즘은 새롭고 효과적인 이미지 암호화 방법중의 하나로 제시되고 있다. 본 논문에서 우리는 기존의 혼돈신호를 이용한 암호화 방법의 혼돈신호가 특정 값에 변중된 분포로 생성되는 현상에 대한 암호화의 문제점을 보이고 우리가 설계한 다중변수 혼돈계를 이용한 암호화 알고리즘은 혼돈신호의 분포가 생성되는 신호의 전체 영역에 일정한 분포로 발생되는 것을 보인다. 우리는 이미지를 암호화하고 복호화한 결과값으로 우리가 제시한 다중변수 혼돈계를 이용한 암호화 방법의 타당성을 제시한다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.164-167
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• 2002

This paper presents the design of Rijndael crypto-processor with 128 bits, 192 bits and 256 bits key size. In October 2000 Rijndael cryptographic algorithm is selected as AES(Advanced Encryption Standard) by NIST(National Institute of Standards and Technology). Rijndael algorithm is strong in any known attacks. And it can be efficiently implemented in both hardware and software. We implement Rijndael algorithm in hardware, because hardware implementation gives more fast encryptioN/decryption speed and more physically secure. We implemented Rijndael algorithm for 128 bits, 192 bits and 256 bits key size with VHDL, synthesized with Synopsys, and simulated with ModelSim. This crypto-processor is implemented using on-the-fly key generation method and using lookup table for S-box/SI-box. And the order of Inverse Shift Row operation and Inverse Substitution operation is exchanged in decryption round operation of Rijndael algorithm. It brings about decrease of the total gate count. Crypto-processor implemented in these methods is applied to mobile systems and smart cards, because it has moderate gate count and high speed.

• KSII Transactions on Internet and Information Systems (TIIS)
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• 제11권6호
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• pp.3254-3272
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• 2017

With the development of wireless access technologies and the popularity of mobile intelligent terminals, cloud computing is expected to expand to mobile environments. Attribute-based encryption, widely applied in cloud computing, incurs massive computational cost during the encryption and decryption phases. The computational cost grows with the complexity of the access policy. This disadvantage becomes more serious for mobile devices because they have limited resources. To address this problem, we present an efficient verifiable outsourced scheme based on the bilinear group of prime order. The scheme is called the verifiable outsourced computation ciphertext-policy attribute-based encryption scheme (VOC-CP-ABE), and it provides a way to outsource intensive computing tasks during encryption and decryption phases to CSP without revealing the private information and leaves only marginal computation to the user. At the same time, the outsourced computation can be verified by two hash functions. Then, the formal security proofs of its (selective) CPA security and verifiability are provided. Finally, we discuss the performance of the proposed scheme with comparisons to several related works.

• 한국멀티미디어학회논문지
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• 제7권12호
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• pp.1708-1718
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• 2004

In this paper, we are concerned with a digital fingerprinting scheme for multi-purchase where a buyer wants to buy more than a digital content. If we apply previous schemes to multi-purchase protocol, the number of execution of registration step and decryption key should be increased in proportion to that of digital contents to be purchased in order to keep unlinkability. More worse, most of fingerprinting schemes in the literature are based on either secure multi-party computation or general zero-knowledge proofs with very high computational complexity. These high complexities complicate materialization of fingerprinting protocol more and more. In this paper, we propose a multi-purchase fingerprinting scheme with lower computational complexity. In the proposed scheme, a buyer executes just one-time registration step regardless of the number of contents to be purchased. The number of decryption key is constant and independent of the number of contents to be purchased. We can also reduce the computational costs of buyers by introducing a concept of proxy-based fingerprinting protocol.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.944-947
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• 2002

We implemented a cryptoprocessor with a on-the-fly key scheduler which performs forward key scheduling for encryption and reverse key scheduling for decryption. This scheduler makes the fast generation of the key value and eliminates the memory for software key scheduler. The 128-bit Rijndael processor is implemented based on the proposed architecture using Verilog-HDL and targeted to Xilinx XCV1000E FPGA device. As a result, the 128-bit Rijndael operates at 38.8MHz with on-the-fly key scheduler and consumes 11 cycles for encryption and decryption resulting in a throughput of 451.5Mbps

• 한국멀티미디어학회논문지
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• 제9권10호
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• pp.1371-1379
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• 2006

본 논문에서는 여러 문자열 단위로 입력되는 문자열을 하나의 문자열로 구성하기 위하여 문자열 길이 정보를 이용한 패딩 알고리즘을 제안한다. 기존의 패딩 알고리즘은 단순히 공백 문자를 삽입함으로써 실제 문자열과 패딩 문자를 구분하지 못하는 문제점을 가지고 있다. 이러한 문제점을 해결하기 위하여 본 논문에서는 패딩하는 문자열 길이를 패딩 값으로 구성한다. 이렇게 함으로써 단순히 공백 문자나 '00'을 패딩하는 경우보다 문자열과 패딩 문자를 구분하는 것이 훨씬 용이하고, 정확히 동작된다. 본 논문에서 제안하는 패딩 알고리즘은 데이터 암호화 및 복호화 알고리즘에 사용가능하다.

• 전기학회논문지
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• 제57권9호
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• pp.1652-1659
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• 2008

With the increase of huge amount of data in network systems, ultimate high-speed network has become an essential requirement. In such systems, the encryption and decryption process for security becomes a bottle-neck. For this reason, the need of hardware implementation is strongly emphasized. In this study, a mixed inner and outer round pipelining architecture is introduced to achieve high speed performance of ARIA hardware. Multiplexers are used to control the lengths of rounds for 3 types of keys. Merging of encryption module and key initialization module increases the area efficiency. The proposed hardware architecture is implemented on reconfigurable hardware, Xilinx Virtex2-pro. The hardware architecture in this study shows that the area occupied 6437 slices and 128 BRAMs, and it is translated to throughput of 24.6Gbit/s with a maximum clock frequency of 192.9MHz.

• 한국컴퓨터정보학회:학술대회논문집
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• 한국컴퓨터정보학회 2018년도 제58차 하계학술대회논문집 26권2호
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• pp.331-332
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• 2018

일반적으로 정보를 전달함에 있어 정보의 유출은 큰 문제이다. 정보를 전달하는 방법이 발달하고 보편화됨에 따라 오늘날에 와서는 개인정보 유출과 관련된 문제가 지속적으로 대두되었다. 개인정보의 보호가 더욱 중요하게 생각되는 현 상황을 고려하여 스크래치(Scratch)의 기본 연산기능을 이용한 한글과 특수문자, 영어 암호화(Encryption) 및 복호화(Decryption)를 가능하게 하고, 정수 형태의 2개의 개인키와 간단한 알고리즘을 통해 암호문을 생성하는 어플리케이션을 통해 암호화와 복호화에 대한 개념을 학습하고, 더욱 나아가 개인정보 보호에 대한 중요성을 상기할 수 있도록 하였다.

• Journal of the Optical Society of Korea
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• 제16권3호
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• pp.263-269
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• 2012

In this paper, we propose a new dual optical encryption method for binary data and secret key based on 2-step phase-shifting digital holography for a cryptographic system. Schematically, the proposed optical setup contains two Mach-Zehnder type interferometers. The inner interferometer is used for encrypting the secret key with the common key, while the outer interferometer is used for encrypting the binary data with the same secret key. 2-step phase-shifting digital holograms, which result in the encrypted data, are acquired by moving the PZT mirror with phase step of 0 or ${\pi}/2$ in the reference beam path of the Mach-Zehnder type interferometer. The digital hologram with the encrypted information is a Fourier transform hologram and is recorded on CCD with 256 gray level quantized intensities. Computer experiments show the results to be encryption and decryption carried out with the proposed method. The decryption of binary secret key image and data image is performed successfully.

• 한국정보통신학회논문지
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• 제7권7호
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• pp.1478-1482
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• 2003

In this paper. Rijndael cipher algorithm is implemented by a hardware. It was selected as the AES(Advanced Encryption Standard) by NIST. It has structure that round operation divided into 2 subrounds and subrounds are pipelined to calculate efficiently. It takes 5 clocks for one-round. The AES-128 cipher algorithm is implemented for hardware by ALTERA FPGA, and, analyzed the performance. The AES-128 cipher algorithm has approximately 424 Mbps encryption rate for 166Mhz max clock frequency. In case of decryption, it has 363 Mbps decryption rate fu 142Mhz max clock frequency. In case of cipher core, it has 320Mbps encryptionㆍdecryption rate for 125Mhz max clock frequency.