• The Journal of the Korea institute of electronic communication sciences
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• v.16 no.6
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• pp.1053-1058
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• 2021

This paper presents the multi-band mixer which converts a X-, K- and Ka-band adaptively by adjusting the gate-bias voltage of an active device. The proposed mixer presented a conversion loss of -10 dB at -0.8 V gate-bias voltage for X-band, a conversion loss of -9 dB at -0.3 V gate-bias voltage for K-band and for Ka-band, a conversion loss of -7 dB at -0.2 V gate-bias voltage under the LO power of +6.0 dBm. The 1dB compression point (P1dB) is +0.5 dBm for all band.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.10A
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• pp.1223-1229
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• 2004

A variable-gain low-voltage low noise amplifier MMIC operating at 5GHz frequency band is designed and implemented using the ETRI 0.5$\mu\textrm{m}$ GaAs MESFET library process. This low noise amplifier is designed to have the variable gain for adaptive antenna array combined in HIPERLAN/2. The feedback circuit of a resistor and channel resistance controlled by the gate voltage of enhancement MESFET is proposed for the variable-gain low noise amplifier consisted of cascaded two stages. The fabricated variable gain amplifier exhibits 5.5GHz center frequency, 14.7dB small signal gain, 10.6dB input return loss, 10.7dB output return loss, 14.4dB variable gain, and 2.98dB noise figure at V$\_$DD/=1.5V, V$\_$GGl/=0.4V, and V$\_$GG2/=0.5V. This low noise amplifier also shows-19.7dBm input PldB, -10dBm IIP3, 52.6dB SFDR, and 9.5mW power consumption.

• 전자공학회논문지 IE
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• v.45 no.2
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• pp.1-5
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• 2008

In this work, RF performance degradation due to hot carrier effects in SOI MOSFET have been measured and analyzed. The LNA that designed at $V_{GS}=0.8V$, f=2.5GHz, gain is 16.51dB and noise figure is 1.195dB. After stress at SOI, the LNA's gain and noise figure change of 15.3dB and 1.44dB with before stress.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.983-986
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• 2003

This paper describes a 2.5V 80dB 360MHz CMOS VGA. A new variable degeneration resistor is proposed where the dc voltage drop over the degeneration resistor is minimized and employed in designing a low-voltage and high-speed CMOS VGA. HSPICE simulation results using a 0.25${\mu}{\textrm}{m}$ CMOS process parameters show that the designed VGA provides a 3dB bandwidth of 360MHz and a 80dB gain control range in 2dB step. Gain errors are less than 0.4dB at 200MHz and less than 1.4dB at 300MHz. The designed circuit consumes 10.8mA from a 2.5V supply and its die area is 1190${\mu}{\textrm}{m}$$\times$360${\mu}{\textrm}{m}$.

• Journal of the Institute of Electronics Engineers of Korea TE
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• v.39 no.4
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• pp.409-412
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• 2002

The LNA(Low Noise Amplifier) is designed for use in low cost commercial application covered fully IMT-2000 band(1920~2170MHz, BW=250MHz). It is optimized source inductance for source lead and designed to equivalent etched line. The LNA uses a high pass impedance matching network for noise match and simple structure. The bias circuit designs have been made self-biased with a negative voltage applied to gate. The power supply voltage is 8V, total current is 180mA. The LNA is biased at a Vgs of -0.4, Vds of 4V for first stage and Vds of 5V for second stage. The LNA is designed competitively for commercial product specification. The measured gain and noise figure of the completed amplifier was 20dB and 1dB, respectively. Also, input VSWR, P1dB and gain flatness was measured of 1.14 ~ l.3dB, 22.4dBm and $\pm$0.45dB, respectively. The designed LNA can be used for commercial product.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.229-232
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• 2001

4H-SIC(silicon carbide) MESFET large signal model was studied using modified Materka-Kacprzak large signal MESFET model. 4H-SiC MESFET device simulation have been conducted by Silvaco's 2D device simulator, ATLAS. The result is modeled using modified Materka large signal model. simulation and modeling results are -8V pinch off voltage, under $V_{GS=0V}$, $V_{DS=25V}$ conditions, $I_{DSS=270㎃}$mm, $G_{m=45㎳}$mm were obtained. Through the power simulation 2GHz, at the bias of $V_{GS=-4V}$ and $V_{DS=25V}$, 10dB Gain, 34dBm(1dB compression point)output power, 7.6W/mm power density, 37% PAE(power added efficiency) were obtained.d.d.d.

• Korean Journal of Mathematics
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• v.18 no.4
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• pp.335-342
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• 2010

Let D be an integral domain with quotient field K,$\mathcal{I}(D)$ be the set of nonzero ideals of D, and $w$ be the star-operation on D defined by $I_w=\{x{\in}K{\mid}xJ{\subseteq}I$ for some $J{\in}\mathcal{I}(D)$ such that J is finitely generated and $J^{-1}=D\}$. The D is called a Pr$\ddot{u}$fer $v$-multiplication domain if $(II^{-1})_w=D$ for all nonzero finitely generated ideals I of D. In this paper, we show that D is a Pr$\ddot{u}$fer $v$-multiplication domain if and only if $(A{\cap}(B+C))_w=((A{\cap}B)+(A{\cap}C))_w$ for all $A,B,C{\in}\mathcal{I}(D)$, if and only if $(A(B{\cap}C))_w=(AB{\cap}AC)_w$ for all $A,B,C{\in}\mathcal{I}(D)$, if and only if $((A+B)(A{\cap}B))_w=(AB)_w$ for all $A,B{\in}\mathcal{I}(D)$, if and only if $((A+B):C)_w=((A:C)+(B:C))_w$ for all $A,B,C{\in}\mathcal{I}(D)$ with C finitely generated, if and only if $((a:b)+(b:a))_w=D$ for all nonzero $a,b{\in}D$, if and only if $(A:(B{\cap}C))_w=((A:B)+(A:C))_w$ for all $A,B,C{\in}\mathcal{I}(D)$ with B, C finitely generated.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.5C
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• pp.522-529
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• 2002

MMIC circuits in whole receiver system was fabricated based on GaAs pHEMT technology. And a V-band downconverter module was fabricated by integrating these circuits. The downconverter module consists of a LO drive power amplifier which generates 24dBm output power, a low noise amplifier(LNA) which shows 20 dB small signal gain, an active parallel feedback oscillator which generates 1.6 dBm output power, and a cascode mixer which shows over 6dB conversion gain. The good conversion gain performance of our mixer made no need to attach any IF amplifier which grows conversion gain. Measured results of the complete downconverter show a conversion gain of over 20 dB between 57.5 GHz and 61.7GHz without IF amplifier.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.29-35
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• 2016

We have demonstrated a $Ti:LiNbO_3$ electro-optic electric-field sensors utilizing a $1{\times}2$ Y-fed balanced-bridge Mach-Zehnder interferometric (YBB-MZI) modulator which uses a 3-dB directional coupler at the output and dipole patch antenna. The operation and design were proved by the BPM simulation. A dc switching voltage of ~16.6 V and an extinction ratio of ~14.7 dB are observed at a wavelength of $1.3{\mu}m$. For a 20 dBm rf power, the minimum detectable electric-fields are ~1.12 V/m and ~3.3 V/m corresponding to a dynamic range of about ~22 dB and ~18 dB at frequencies 10 MHz and 50 MHz, respectively. The sensors exhibit almost linear response for the applied electric-field intensity from 0.29 V/m to 29.8 V/m.

• Bulletin of the Korean Mathematical Society
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• v.58 no.1
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• pp.31-46
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• 2021

Let a and b be positive integers, and let V (G), ��(G), and ��2(G) be the vertex set of a graph G, the minimum degree of G, and the minimum degree sum of two non-adjacent vertices in V (G), respectively. An even [a, b]-factor of a graph G is a spanning subgraph H such that for every vertex v ∈ V (G), dH(v) is even and a ≤ dH(v) ≤ b, where dH(v) is the degree of v in H. Matsuda conjectured that if G is an n-vertex 2-edge-connected graph such that $n{\geq}2a+b+{\frac{a^2-3a}{b}}-2$, ��(G) ≥ a, and ${\sigma}_2(G){\geq}{\frac{2an}{a+b}}$, then G has an even [a, b]-factor. In this paper, we provide counterexamples, which are highly connected. Furthermore, we give sharp sufficient conditions for a graph to have an even [a, b]-factor. For even an, we conjecture a lower bound for the largest eigenvalue in an n-vertex graph to have an [a, b]-factor.