• Journal of the Korea Institute of Information and Communication Engineering
• /
• v.13 no.7
• /
• pp.1371-1378
• /
• 2009

We propose a low-power eFuse one-time programmable (OTP) memory cell based on a logic process. The eFuse OTP memory cell uses separate transistors optimized at program and read mode, and reduces an operation current at read mode by reducing parasitic capacitances existing at both WL and BL. Asynchronous interface, separate I/O, BL SA circuit of digital sensing method are used for a low-power and small-area eFuse OTP memory IP. It is shown by a computer simulation that operation currents at a logic power supply voltage of VDD and at I/O interface power supply voltage of VIO are 349.5${\mu}$A and 3.3${\mu}$A, respectively. The layout size of the designed eFuse OTP memory IP with Dongbu HiTek's 0.18${\mu}$m generic process is 300 ${\times}$557${\mu}m^2$.

• Proceedings of the KIEE Conference
• /
• 2015.07a
• /
• pp.1034-1035
• /
• 2015

Watertight 25.8 kV/600 A/12.5 kA fault current limiters (FCLs) have successfully installed in five areas (Incheon, Seoul, Gyeong-gi, Daejeon, Suwon) on KEPCO power distribution line for the purpose of commercial demonstrations. The fault current limiting operation of this FCL, which includes functions of sensing, commutation, and reduction of fault currents, is perfectly completed within 1 cycle immediately after fault occurs. The performance of FCL was verified by short circuit test, impedance test, insulation test, temperature-rise test, and control test, etc at PT&T in LS industrial systems, which is the official certification institute in Korea. In 2013, and also the FCL field test was performed in order to test the protection coordination between conventional relays and FCL, on the 1.5 kA and 5.0 kA faults, which were made by connecting the Artificial Fault Generator (AFG) to the distribution line in test grid at KEPCO Power Testing Center. The next step of this project is to check the FCL conditions caused by real external environment, and acquire the various data from five regions installed with FCL. In this paper, we intend to explain the FCL specifications and performance characteristics, and check the expected effect by application of FCL to power distribution line based on the power system analysis of an application site.

• Journal of Power Electronics
• /
• v.3 no.2
• /
• pp.99-114
• /
• 2003

This paper presents a feasible development on a highly accurate quick response adjustable speed drive implementation fur general purpose induction motor which operates on the basis of sensorless slip frequency type vector controlled sine-wave PWM inverter with an automatic tuning machine parameter estimation schemes. In the first place, the sensorless vector control theory on the three-phase voltage source-fed inverter induction motor drive system is developed in slip frequency based vector control principle. In particular, the essential procedure and considerations to measure and estimate the exact stator and rotor circuit parameters of general purpose induction motor are discussed under its operating conditions. The speed regulation characteristics of induction motor operated by the three-phase voltage-fed type current controlled PWM inverter using IGBT's is illustrated and evaluated fur machine parameter variations under the actual conditions of low frequency and high frequency operations for the load torque. In the second place, the variable speed induction motor drive system, employing sensorless vector control scheme which is based on three -phase high frequency carrier PWM inverter with automatic toning estimation schemes of the temperature -dependent and -independent machine circuit parameters, is practically implemented using DSP-based controller. Finally, the dynamic speed response performances for largely changed load torque disturbances as well as steady state speed vs. torque characteristics of this induction motor control implementation are illustrated and discussed from an experimental point of view.

• Journal of Welding and Joining
• /
• v.16 no.5
• /
• pp.119-133
• /
• 1998

To implement full automation in pipe welding, it si most important to develop special sensors and their related systems which act like human operator when detecting irregular groove conditions. In this study, an automatic pipe Gas Metal Arc Welding (GMAW) system was proposed to full control pipe welding procedure with intelligent sensor systems. A five-axes manipulator was proposed for welding torch to automatically access to exact welding position when pipe size and welding angle were given. Pool status and torch position were measured by using a weld-pool image monitoring and processing technique in root-pass welding for weld seam tracking and weld pool control. To overcome the intensive arc light, pool image was captured at the instance of short circuit of welding power loop. Captured image was processed to determine weld pool shape. For weld seam tracking, the relative distance of a torch position from the pool center was calculated in the extracted pool shape to move torch just onto the groove center. To control penetration of root pas, gap was calculated in the extracted pool image, and then weld conditions were controlled for obtaining appropriate penetration. welding speed was determined with a fuzzy logic, and welding current and voltage were determined from a data base to correspond to the gap. For automatic fill-pass welding, the function of human operator of real time weld seam control can be substituted by a sensor system. In this study, an arc sensor system was proposed based on a fuzzy control logic. Using the proposed automatic system, root-pass welding of pipe which had gap variation was assured to be appropriately controlled in welding conditions and in torch position by showing sound welding result and good seam tracking capability. Fill-pass welding by the proposed system also showed very successful result by tracking along the offset welding line without any control of human operator.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.12
• /
• pp.31-38
• /
• 2010

This paper presents the design of a graphic memory for QVGA-scale LCD Driver IC (LDI). The graphic memory is designed based on the pseudo-SHAM for the purpose of small area, and the memory cell structure is designed using a bit line partitioning method to improve sensing characteristics and drivabilties in the line-read operation. Also, a collision protection circuit using C-gate is designed to control collisions between read/write operations and self-refresh/line-read operations effectively. The graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and the operations of the graphic memory have been verified using Hspice. The results show that the bit-bitb line voltage difference, ${\Delta}V$ increases by 40%, the charge sharing time between bit and bitb voltages $T_{CHGSH}$ decreases by 30%, and the current during line-read decreases by 40%.

• Journal of the Korean Society of Safety
• /
• v.28 no.4
• /
• pp.1-7
• /
• 2013

Train accidents can be directly connected to fatal accidents-collision, derailment, Fire, railway crossing accidents-resulting in tremendous human casualties. First of all, the railway derailment is not only related to most of railway accidents but also it can lead to much more catastrophic accompanying train overtured than other factors. Therefore, it is most important factor to ensure railway safety. some foreign countries have applied to the detector machines(e.g., ultrasonic detector car, sleep mode, current detector, optical sensing, optical fiber). Since it was developed in order to prevent train from being derailed. In korea, the existing track method has been used to monitor rail condition using track circuit. However, we found out it impossible for Communication Based Train Control system(CBTC), recent technology to detect rail condition using balise(data transmission devices) without no track circuit. For this reason, it is needed instantly to develop real-time monitoring system used to detect broken rails. Firstly, this paper presents domestic and international statues analysis of rail breaks technology. Secondly, the composition and the characteristics of the real-time monitoring system. Finally, the evidence that this system could assumed the location and type of broken rails was proved by the experiment of prototype and operation line tests. We concluded that this system can detect rail break section in which error span exist within${\pm}1m$.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.10 no.2
• /
• pp.138-147
• /
• 2005

This paper presents a SPMSM(Surface-mounted Permanent Magnet Synchronous Motor) servo drive system using high performance TMS320F2812 DSP for the industrial application. The DSP(Digital Signal Processor) Controller enables an enhanced real time algorithm and cost-effective design intelligent for only exclusively motor drives which can be yield enhanced operation, fewer system components, lower control system cost, increased efficiency and high performance. The suggested system contain speed and current sensing circuits, SVPWM(Space Vector Pulse Width Modulation) and I/O interface circuit. The developed servo drive control system showns a good response characteristics results and high performance features in general purposed 400[w] machine. This system can achieve cost reduction and size minimization of controllers.

• Journal of Sensor Science and Technology
• /
• v.5 no.5
• /
• pp.63-68
• /
• 1996

In order to implement the integrated capacitive pressure sensors, which contains integrated interface circuits to detect the electrical output signal, several main factors that have a bad effect on the characteristics of sensors must be improved, such as parasitic capacitance effects, temperature/thermal drift, and the leakage current of a readout circuitry. This paper describes the novel design of the dedicated CMOS readout circuitry that is consists of two capacitance to frequency converters and 4 bit digital logic compensating circuits. Dividing the oscillation frequency of a sensing sensor by that of reference sensor, this circuit is designed to eliminate the thermal/temperature drift and the effect of the leakage currents, and to access a digital signals to obtain a high signal-to-noise(S/N)ratio. Therefore, the resolution of this circuit can be increased by increasing the number of the digital bits. Digital compensated circuits of this circuits, except for the C-F converters, are fabricated on a FPGA chip, and fundamental performance of the circuits are evaluated.

• Journal of the Korea Academia-Industrial cooperation Society
• /
• v.21 no.12
• /
• pp.702-708
• /
• 2020

Recently, as LED display systems have become larger, research on effective power control methods for the systems has been in progress. This paper proposes a power control method to minimize power loss due to the difference in LED characteristics for each channel of a backlight unit (BLU) system. The proposed LED driver IC has a power optimization function and detects the minimum headroom voltage for constant current operation of all channels and linearly controls the DC-DC converter output. Thus, it minimizes power consumption due to unnecessary additional voltage. In addition, it does not require a voltage sensing comparator or a voltage generation circuit for each channel. This has a great advantage in reducing the chip size and for stabilization when implementing an integrated circuit. In order to verify the proposed function, an IC was designed using Cadence and Synopsys' design tools, and it was fabricated with a Magnachip 0.35um 5V/40V CMOS process. The experiments confirmed that the proposed power control method controls the minimum required voltage of the BLU system.

• Journal of IKEEE
• /
• v.20 no.2
• /
• pp.163-166
• /
• 2016

It is important to operate the driving circuit under the optimal condition through precisely sensing the power consumption causing the temperature made mainly by the MOSFET (metal-oxide semiconductor field-effect transistor) when a BLDC (Brushless Direct Current) motor operates. In this letter, a Super-junction (SJ) power TMOSFET (trench metal-oxide semiconductor field-effect transistor) with an ultra-low specific on-resistance of $0.96m{\Omega}{\cdot}cm^2$ under the same break down voltage of 100 V is designed by using of the SILVACO TCAD 2D device simulator, Atlas, while the specific on-resistance of the traditional power MOSFET has tens of $m{\Omega}{\cdot}cm^2$, which makes the higher power consumption. The SPICE simulation for measuring the power distribution of 25 cells for a chip is carried out, in which a unit cell is a SJ Power TMOSFET with resistor arrays. In addition, the power consumption for each unit cell of SJ Power TMOSFET, considering the number, pattern and position of bonding, is computed and the power distribution for an ANSYS model is obtained, and the SJ Power TMOSFET is designed to make the power of the chip distributed uniformly to guarantee it's reliability.