• Title/Summary/Keyword: current mirror array

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Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement

  • Lee, Sooeun;Han, Seungho;Lee, Ikho;Sim, Jae-Yoon;Park, Hong-June;Kim, Byungsub
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.184-193
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    • 2015
  • This paper proposes a cost-efficient and automatic method for large data acquisition from a test chip without expensive equipment to characterize random process variation in an integrated circuit. Our method requires only a test chip, a personal computer, a cheap digital-to-analog converter, a controller and multimeters, and thus large volume measurement can be performed on an office desk at low cost. To demonstrate the proposed method, we designed a test chip with a current model logic driver and an array of 128 current mirrors that mimic the random process variation of the driver's tail current mirror. Using our method, we characterized the random process variation of the driver's voltage due to the random process variation on the driver's tail current mirror from large volume measurement data. The statistical characteristics of the driver's output voltage calculated from the measured data are compared with Monte Carlo simulation. The difference between the measured and the simulated averages and standard deviations are less than 20% showing that we can easily characterize the random process variation at low cost by using our cost-efficient automatic large data acquisition method.

A new approach to the current regulator design of LED strings based on current mirror

  • Kim, Pu-Jin;Yoo, Min-Ki;Lee, Rok-Hee;Lee, Koo-Hwa;Jang, Kyeong-Kun;Kang, Sin-Ho
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.837-840
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    • 2008
  • This paper studies the current regulator of LED Backlighting system for LCD. The proposed regulator and a typical regulator are introduced. To find out the characteristics of two regulators, Prototype samples of LED Backlighting system are made. Both the proposed regulator and a typical regulator are compared with electrical, thermal and optical characteristics each viewpoint.

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Design of Multiple Valued Logic Circuits with ROM Type using Current Mode CMOS (전류방식 CMOS에 의한 ROM 형의 다치 논리 회로 설계)

  • 최재석;성현경
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.31B no.4
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    • pp.55-61
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    • 1994
  • The multiple valued logic(MVL) circuit with ROM type using current mode CMOS is presented in this paper. This circuit is composed of the multiple valued-to-binary(MV/B) decoder and the selection circuit. The MV/B decoder decodes the single input multiple valued signal to N binary signal, and the selection circuits is composed N$\times$N array of the selecion cells with ROM types. The selection cell is realized with the current mirror circuits and the inhibit circuits. The presented circuit is suitable for designing the circuit of MVL functions with independent variables, and reduces the number of selection cells for designing the circuit of symmetric MVL functions as many as {($N^2$-N)/2}+N. This circuit possess features of simplicity. expansibility for array and regularity, modularity for the wire routing. Also, it is suitable for VLSI implementation.

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The 4bit Cell Array Structure of PoRAM and A Sensing Method for Drive this Structure (PoRAM의 4bit 셀 어레이 구조와 이를 동작시키기 위한 센싱 기법)

  • Kim, Jung-Ha;Lee, Sang-Sun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.6 s.360
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    • pp.8-18
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    • 2007
  • In this paper, a 4bit cell way structure of PoRAM and the sensing method to drive this structure are researched. PoRAM has a different operation from existing SRAM and DRAM. The operation is that when certain voltage is applied between top electrode and bottom electrode of PoRAM device we can classify the cell state by measuring cell current which is made by changing resistance of the cell. In the decoder selected by new-addressing method in the cell array, the row decoder is selected "High" and the column decoder is selected "Low" then certain current will flow to the bit-line. Because this current is detect, in order to make large enough current, the voltage sense amplifier is used. In this case, usually, 1-stage differential amplifier using current mirror is used. Furthermore, the detected value at the cell is current, so a diode connected NMOSFET, that is, a device resistor is used at the input port of the differential amplifier to converter current into voltage. Using this differential amplifier, we can classify the cell states, erase mode is "Low" and write mode is "High", by comparing the input value, Vin, that is a product of current value multiplied by resistor value with a reference voltage, Vref.

A Signal Readout System for CNT Sensor Arrays (CNT 센서 어레이를 위한 신호 검출 시스템)

  • Shin, Young-San;Wee, Jae-Kyung;Song, In-Chae
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.48 no.9
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    • pp.31-39
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    • 2011
  • In this paper, we propose a signal readout system with small area and low power consumption for CNT sensor arrays. The proposed system consists of signal readout circuitry, a digital controller, and UART I/O. The key components of the signal readout circuitry are 64 transimpedance amplifiers (TIA) and SAR-ADC with 11-bit resolution. The TIA adopts an active input current mirror (AICM) for voltage biasing and current amplification of a sensor. The proposed architecture can reduce area and power without sampling rate degradation because the 64 TIAs share a variable gain amplifier (VGA) which needs large area and high power due to resistive feedback. In addition, the SAR-ADC is designed for low power with modified algorithm where the operation of the lower bits can be skipped according to an input voltage level. The operation of ADC is controlled by a digital controller based on UART protocol. The data of ADC can be monitored on a computer terminal. The signal readout circuitry was designed with 0.13${\mu}m$ CMOS technology. It occupies the area of 0.173 $mm^2$ and consumes 77.06${\mu}W$ at the conversion rate of 640 samples/s. According to measurement, the linearity error is under 5.3% in the input sensing current range of 10nA - 10${\mu}A$. The UART I/O and the digital controller were designed with 0.18${\mu}m$ CMOS technology and their area is 0.251 $mm^2$.

Current Status of Ceramic Composites Technology for Space Vehicle (우주비행체용 세라믹 복합재료 해외기술 동향)

  • Lee, Ho-Sung
    • Current Industrial and Technological Trends in Aerospace
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    • v.7 no.2
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    • pp.76-84
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    • 2009
  • In this review an attempt is made to give the background to the current trends in foreign developments in the ceramic matrix composites for space vehicles. The lightweight and high temperature specific modulus properties of ceramic composites have continued to develop for designing advanced propulsion structures and for increasing space vehicle performances. Those applications require advanced materials with good resistance to high temperatures, to oxidation environments and to mechanical stresses. The advantages of ceramic matrix composites are the low specific weight, the high specific strength over a wide temperature ranges, and their good damage tolerance compared to tungsten, pyrographites and polycrystalline graphites. Due to these advantages ceramic matrix composites are currently used in rocket engine chamber, nozzle, solar array, radar antenna, mirror support structures, hypersonic leading edge articles, heat shields, reentry vehicle nose tips, and radiators for spacecraft. Various processes are discussed together with examples of current application so that some of the advanced technologies can be possibly applied to Korean space technology.

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Atmospheric Turbulence Simulator for Adaptive Optics Evaluation on an Optical Test Bench

  • Lee, Jun Ho;Shin, Sunmy;Park, Gyu Nam;Rhee, Hyug-Gyo;Yang, Ho-Soon
    • Current Optics and Photonics
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    • v.1 no.2
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    • pp.107-112
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    • 2017
  • An adaptive optics system can be simulated or analyzed to predict its closed-loop performance. However, this type of prediction based on various assumptions can occasionally produce outcomes which are far from actual experience. Thus, every adaptive optics system is desired to be tested in a closed loop on an optical test bench before its application to a telescope. In the close-loop test bench, we need an atmospheric simulator that simulates atmospheric disturbances, mostly in phase, in terms of spatial and temporal behavior. We report the development of an atmospheric turbulence simulator consisting of two point sources, a commercially available deformable mirror with a $12{\times}12$ actuator array, and two random phase plates. The simulator generates an atmospherically distorted single or binary star with varying stellar magnitudes and angular separations. We conduct a simulation of a binary star by optically combining two point sources mounted on independent precision stages. The light intensity of each source (an LED with a pin hole) is adjustable to the corresponding stellar magnitude, while its angular separation is precisely adjusted by moving the corresponding stage. First, the atmospheric phase disturbance at a single instance, i.e., a phase screen, is generated via a computer simulation based on the thin-layer Kolmogorov atmospheric model and its temporal evolution is predicted based on the frozen flow hypothesis. The deformable mirror is then continuously best-fitted to the time-sequenced phase screens based on the least square method. Similarly, we also implement another simulation by rotating two random phase plates which were manufactured to have atmospheric-disturbance-like residual aberrations. This later method is limited in its ability to simulate atmospheric disturbances, but it is easy and inexpensive to implement. With these two methods, individually or in unison, we can simulate typical atmospheric disturbances observed at the Bohyun Observatory in South Korea, which corresponds to an area from 7 to 15 cm with regard to the Fried parameter at a telescope pupil plane of 500 nm.

Four-Channel Differential CMOS Optical Transimpedance Amplifier Arrays for Panoramic Scan LADAR Systems (파노라믹 스캔 라이다 시스템용 4-채널 차동 CMOS 광트랜스 임피던스 증폭기 어레이)

  • Kim, Sang Gyun;Jung, Seung Hwan;Kim, Seung Hoon;Ying, Xiao;Choi, Hanbyul;Hong, Chaerin;Lee, Kyungmin;Eo, Yun Seong;Park, Sung Min
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.9
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    • pp.82-90
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    • 2014
  • In this paper, a couple of 4-channel differential transimpedance amplifier arrays are realized in a standard 0.18um CMOS technology for the applications of linear LADAR(laser detection and ranging) systems. Each array targets 1.25-Gb/s operations, where the current-mode chip consists of current-mirror input stage, a single-to-differential amplifier, and an output buffer. The input stage exploits the local feedback current-mirror configuration for low input resistance and low noise characteristics. Measurements demonstrate that each channel achieves $69-dB{\Omega}$ transimpedance gain, 2.2-GHz bandwidth, 21.5-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -20.5-dBm), and the 4-channel total power dissipation of 147.6-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations. Meanwhile, the voltage-mode chip consists of inverter input stage for low noise characteristics, a single-to-differential amplifier, and an output buffer. Test chips reveal that each channel achieves $73-dB{\Omega}$ transimpedance gain, 1.1-GHz bandwidth, 13.2-pA/sqrt(Hz) average noise current spectral density (corresponding to the optical sensitivity of -22.8-dBm), and the 4-channel total power dissipation of 138.4-mW from a single 1.8-V supply. The measured eye-diagrams confirms wide and clear eye-openings for 1.25-Gb/s operations.

Experiment of KOMPSAT-3/3A Absolute Radiometric Calibration Coefficients Estimation Using FLARE Target (FLARE 타겟을 이용한 다목적위성3호/3A호의 절대복사 검보정 계수 산출)

  • Kyoungwook Jin;Dae-Soon Park
    • Korean Journal of Remote Sensing
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    • v.39 no.6_1
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    • pp.1389-1399
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    • 2023
  • KOMPSAT-3/3A (K3/K3A) absolute radiometric calibration study was conducted based on a Field Line of sight Automated Radiance Exposure (FLARE) system. FLARE is a system, which has been developed by Labsphere, Inc. adopted a SPecular Array Radiometric Calibration (SPARC) concept. The FLARE utilizes a specular mirror target resulting in a simplified radiometric calibration method by minimizing other sources of diffusive radiative energies. Several targeted measurements of K3/3A satellites over a FLARE site were acquired during a field campaign period (July 5-15, 2021). Due to bad weather situations, only two observations of K3 were identified as effective samples and they were employed for the study. Absolute radiometric calibration coefficients were computed using combined information from the FLARE and K3 satellite measurements. Comparison between the two FLARE measurements (taken on 7/7 and 7/13) showed very consistent results (less than 1% difference between them except the NIR channel). When additional data sets of K3/K3A taken on Aug 2021 were also analyzed and compared with gain coefficients from the metadata which are used by current K3/K3A, It showed a large discrepancy. It is assumed that more studies are needed to verify usefulness of the FLARE system for the K3/3A absolute radiometric calibration.