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Cost-Efficient and Automatic Large Volume Data Acquisition Method for On-Chip Random Process Variation Measurement

  • Lee, Sooeun (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH)) ;
  • Han, Seungho (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH)) ;
  • Lee, Ikho (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH)) ;
  • Sim, Jae-Yoon (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH)) ;
  • Park, Hong-June (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH)) ;
  • Kim, Byungsub (Dept. of Electronic and Electrical Engineering Pohang University of Science and Technology (POSTECH))
  • 투고 : 2014.08.20
  • 심사 : 2015.01.01
  • 발행 : 2015.04.30

초록

This paper proposes a cost-efficient and automatic method for large data acquisition from a test chip without expensive equipment to characterize random process variation in an integrated circuit. Our method requires only a test chip, a personal computer, a cheap digital-to-analog converter, a controller and multimeters, and thus large volume measurement can be performed on an office desk at low cost. To demonstrate the proposed method, we designed a test chip with a current model logic driver and an array of 128 current mirrors that mimic the random process variation of the driver's tail current mirror. Using our method, we characterized the random process variation of the driver's voltage due to the random process variation on the driver's tail current mirror from large volume measurement data. The statistical characteristics of the driver's output voltage calculated from the measured data are compared with Monte Carlo simulation. The difference between the measured and the simulated averages and standard deviations are less than 20% showing that we can easily characterize the random process variation at low cost by using our cost-efficient automatic large data acquisition method.

키워드

참고문헌

  1. Gyo Sub Lee and Changhwan Shin, "Computing- Inexpensive Matrix Model for Estimating the Threshold Voltage Variation by Workfunction Variation in High-$\kappa$/Metal-gate MOSFETs," Journal of Semiconductor Technology and Science, Vol. 14, No. 1, pp. 96-99, Feb. 2014. https://doi.org/10.5573/JSTS.2014.14.1.096
  2. Seon-Kyoo Lee, Seung-Hun Lee, Dennis Sylvester, David Blaauw, and Jae-Yoon Sim, "A 95fJ/b Current- Mode Transceiver for 100mm On-Chip Interconnect," IEEE International Solid-Stage Circuit Conference Digest of Technical Paper, Feb 2013, pp. 262-263.
  3. Jone F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benhamin D. Parker, Micheal P. Beakes, Aichin Chung, Troy J. Beukema, Peter K. Pepeljugoski, Lei Shan, Young H. Kwark, Sudhir Gowda, and Daniel J. Friedman, "A 10-Gb/s, 5-Tap DFE/4-Tap FFE transmitter in 90-nm CMOS Technology," IEEE Journal of Solid-State Circuits, vol. 41, no.12, Dec. 2006.
  4. Vladimir Stojanovic, Andrew Ho, Bruno W. Garlepp, Fred Chen, Jason Wei, Grace Tsang, Elad Alon, Ravi T. Kollipara, Carl W. Werner, Jared L. Zerbe, and Mark A. Horowitz, "Autonomous Dual-Mode (PAM2/4) Serial Link Transceiver With Adaptive Equalization and Data Recovery," IEEE Journal of Solid-State Circuits, vol. 40, no. 4, pp. 1012-1026, Apr. 2005. https://doi.org/10.1109/JSSC.2004.842863
  5. Chang-Hyun Bae, Dong-Ho Choi, Keun-Seon Ahn, and Changsik Yoo, "A 6-Gb/s Differential Voltage Mode Driver with Independent Control of Output Impedance and Pre-Emphasis Level," Journal of Semiconductor Technology and Science, Vol. 13, No. 5, pp. 423-429, Oct. 2013. https://doi.org/10.5573/JSTS.2013.13.5.423
  6. Sopan Joshi, Jason T.-S. Liao, Yongping Fan, Sami Hyvonen, Mahalingam Hagarajan, Jad Rizk, Hyung-Jin Lee, and Ian Young, "A 12-Gb/s transciever in 32-nm bulk CMOS," IEEE 2009 Symp. VLSI Circuits Digest of Technical Papers, June 2009, pp. 52-53.
  7. Sang-Hune Park, Kwang-Hee Choi, Hung-Bum Shin, Jae-Yoon Sim, and Hong-June Park, "A Single-Data- Bit Blind Oversampling Data-Recovery Circuit With an Add-Drop FIFO for USB2.0 High-Speed Interface," IEEE Transactions on Circuits and Systems II: Express briefs, 2008, vol. 55, no. 2, pp. 156-160. https://doi.org/10.1109/TCSII.2007.911791
  8. Arvind, Rishiyur S. Nikhil, Daniel L. Rosenband, and Nirav Dave, "High-level Synthesis: An Essential Ingredient for Designing Complex ASICs," IEEE International Conference on Computer-Aided Design, Nov 2014, pp. 775-782.