• Transactions on Electrical and Electronic Materials
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• v.5 no.2
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• pp.66-70
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• 2004

The Sr$\_$0.7/Bi$\_$2.3/Ta$_2$O$\_$9/(SBT)thin films are deposited on Pt-coated electrode (Pt/TiO$_2$/SiO$_2$/Si) using a RE magnetron sputtering method. The ferroelectric properties of SBT capacitors with annealing times were studied. As a result of conducting the X-ray diffraction analysis and the electron microscopy analysis, the perovskite phase began to grow from 10 minutes after annealing the specimen, and excellent crystallization was accomplished at 60 minutes after annealing the specimen. The remanet polarization (2P$\_$r/) value and the coercive electric field (E$\_$c/) of the SBT thin film specimen showed the most excellent characteristics at 60 minutes after annealing the specimen, which were approximately 12.40 C/$\textrm{cm}^2$ and 30 kV/cm, respectively. The leakage current density of the SBT thin film specimen as annealed for 60 minutes was approximately 2.81${\times}$10$\^$－9/A/$\textrm{cm}^2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.24 no.6
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• pp.433-439
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• 2011

Poly Si TFTs (poly silicon thin film transistors) with p channel those are annealed HT (high temperature) with gate poly crystalline silicon and LT (low temperature) with metal gate electrode were fabricated on quartz substrate using the analyzed data and compared according to the activated grade silicon thin films and the size of device channel. The electrical characteristics of HT poly-Si TFTs increased those are the on current, electron mobility and decrease threshold voltage by the quality of particles of active thin films annealed at high temperature. But the on/off current ratio reduced by increase of the off current depend on the hot carrier applied to high gate voltage. Even though the size of the particles annealed at low temperature are bigger than HT poly-Si TFTs due to defect in the activated grade poly crystal silicon and the grain boundary, the characteristics of LT poly-Si TFTs were investigated deterioration phenomena those are decrease the electric off current, electron mobility and increase threshold voltage. The results of transconductance show that slope depend on the quality of particles and the amplitude depend on the size of the active silicon particles.

• 한국정보디스플레이학회:학술대회논문집
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• 2007.08b
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• pp.1388-1390
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• 2007

This paper investigates how various concentrations of lithium ion influence on crystallization of MgO in thin films formed by spin coating and an the discharge characteristic in a flat fluorescent lamp structure. The XRD results indicate $Li^+$ ion enhances the growth of MgO crystal in a spin coated thin film. The discharge property with the $Li^+$ ion doped MgO films show the lithium ion in MgO film clearly reduce the initial discharge voltages of test devices. Interestingly, the test panels with various doped MgO film have somewhat higher static memory margin of than that of pure-MgO owing probably to the pore structure of spin coated MgO films. The CL spectra, which confirm that the doping creates defects energy levels in the band gap of MgO, show the $F^+$ center is the main defects in doped MgO films.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.309-309
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• 2012

Heteroepitaxial growth remains as one of the continuously growing interests, because the heterogeneous crystallization on different substrates is a common feature in the fabrication processes of many semiconductor materials and devices, such as molecular beam epitaxy, pulsed laser deposition, sputtering, chemical bath deposition, chemical vapor deposition, hydrothermal synthesis, vapor phase transport and so on [1,2]. By using the R.F. sputtering system, ZnO thin films were deposited on graphene 4 and 6 mono layers, which is grown on 400 nm and 600 nm $SiO_2$ substrates, respectively. The ZnO thin layer was deposited at various temperatures by using a ZnO target. In this experimental, the working power and pressure were $3{\times}10^{-3}$ Torr and 50 W, respectively. The base pressure of the chamber was kept at a pressure around $10^{-6}$ Torr by using a turbo molecular pump. The oxygen and argon gas flows were controlled around 5 and 10 sccm by using a mass flow controller system, respectively. The structural properties of the samples were analyzed by XRD measurement. The film surface and carrier concentration were analyzed by an atomic force microscope and Hall measurement system. The surface morphologies were observed using field emission scanning electron microscope (FE-SEM).

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.345-345
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• 2010

1T-DRAM cell with solid phase (SPC) crystallized poly-Si thin film transistor was fabricated and electrical characteristics were evaluated. The fabricated device showed kink effect by negative back bias. Kink current is due to the floating body effect and it can be used to memory operation. Current difference between "1" state and "0" state was defined and the memory properties can be improved by using gate induced drain leakage (GIDL) current.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.244.2-244.2
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• 2016

폴리 실리콘 박막은 저온 안정성, 산화 안정성, 가스 투과성 및 전기재료로서의 우수한 물성 때문에 산업에서 계속적으로 넓게 쓰이고 있다. 특히 최근 높은 색 재현율과 고화질로 각광을 받고 있는 능동형 유기발광 다이오드 (AMOLED)를 위한 Thin Film Transistor (TFT)는 신뢰성 및 우수한 특성이 요구되기 때문에 반드시 폴리실리콘 TFT가 적용되어야 한다. 이러한 이유 때문에 아모포스 실리콘을 폴리실리콘으로 결정화 시키는 방법들이 많이 연구 되어져왔다. 이 연구에서는 아모포스 실리콘 박막을 고품질의 폴리실리콘 박막으로 제조하기 위해, 기판에 positive DC 전압을 펄스 형태로 인가함으로써, 기판에 입사되는 전자를 이용한 열처리 방법을 사용하였다. 열처리 온도는 기판에 들어오는 current값을 조절함으로써 제어할 수 있었다. 열처리를 위해 사용 된 수소화 된 아모포스 실리콘은 Low Pressure Chemical Vapor Deposition (LPCVD)장비로 530도에서 증착 되었으며, 이러한 아모포스 실리콘 박막은 공정시간 60 s 이내에 샘플 표면온도가 600도 이상으로 증가함으로써 균일한 폴리실리콘 막으로 제조 되었다.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.48 no.9
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• pp.623-627
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• 1999

We report a new in-situ fluorine passivation method without in implantation by employing excimer laser annealing of $SiO_{x}F_{y}$/a-Si structure and its effects on p-channel poly-Si TFTs. The proposed method doesn't require any additional annealing step and is a low temperature process because fluorine passivation is simultaneous with excimer-laser-induced crystallization. A in-situ fluorine passivation by the proposed method was verified form XPS analysis and conductivity measurement. From experimental results, it has been shown that the proposed method is effective to improve the electrical characteristics, specially field-effect mobility, and the electrical stability of p-channel poly-Si TFTs. The improvement id due to fluorine passivation, which reduces the trap state density and forms the strong Si-F bonds in poly-Si channel and $SiO_2/poly-Si$ interface. From these results, the high performance poly-Si TFTs canbe obtained by employing the excimer-laser-induced fluorine passivation method.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1998.11a
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• pp.335-338
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• 1998

Ferroelectric Sr$_2$(Nb,Ta)$_2$O$_{7}$ (SNTO) thin films were prepared by chemical solution deposition processes. SNTO thin films were spin-coated on Pt/Ti/SiO$_2$/(100)Si substrates. After multiple coating, dried thin films were heat-treated for decomposition of residual organics and crystallization. B site-rich impurity phase, i.e. [Sr(Nb,Ta)$_2$O$_{6}$], was found after annealing, where its appearance was dependent on process temperature indicating the possible reaction with substrate. Dielectric and other relevant electrical properties were measured and the results showed a little possibility in ferroelectric gate random access memory devices.s.s.

• Journal of the Microelectronics and Packaging Society
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• v.11 no.2 s.31
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• pp.29-35
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• 2004

Hafnium-oxide gate dielectric films deposited by a metal organic chemical vapor deposition technique on a $N_2-plasma$ treated SiNx and a hydrogen-terminated Si substrate have been investigated. In the case of $HfO_2$ film deposited on a hydrogen-terminated Si substrate, suppressed crystallization with effective carbon impurity reduction was obtained at $450^{\circ}C$. X-ray photoelectron spectroscopy indicated that the interface layer was Hf-silicate rather than phase separated Hf-silicide and silicon oxide structure. Capacitance-voltage measurements show equivalent oxide thickness of about 2.6nm for a 5.0 nm $HfO_2/Si$ single layer capacitor and of about 2.7 nm for a 5.7 nm $HfO_2/SiNx/Si$ stack capacitor. TEM shows that the interface of the stack capacitor is stable up to $900^{\circ}C$ for 30 sec.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.06a
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• pp.202-203
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• 2007

Ferroelectric SBT($SrBi_2Ta_2O_9$) thin films were deposited on Pt/Ti/$SiO_2$/Si substrate using R.F. magnetron sputtering method. The ferroelectric and electric characteristics were investigated with various post-annealing of Pt at $200{\sim}600^{\circ}C$. Compared with SBT thin film which had not post-annealed, the electrical properties and crystallizations of the SBT thin films were relatively improved by the post-annealing of Pt bottom electrode. The crystallization were characterized by X-ray diffraction (XRD). The electrical properties characteristics were observed by HP 4192A and precision LC.