• Journal of the Institute of Convergence Signal Processing
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• v.1 no.2
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• pp.177-185
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• 2000

In this paper CPLD design of cryptographic coprocessor which implements SEED algorithm is described. To satisfy trade-off between area and speed, the coprocessor has structure in which 1 round operation is divided into three subrounds and then each subround is executed using one clock. To improve clock frequency, online precomputation scheme for round key is used. To apply the coprocessor to various applications, four operating modes such as ECB, CBC, CFB, and OFB are supported. The cryptographic coprocessor is designed using Altera EPF10K100GC503-3 CPLD device and its operation is verified by encryption or decryption of text files through ISA bus interface. It consists of about 29,300 gates and performance of CPLD chip is about 44 Mbps encryption or decryption rate under 18 Mhz clock frequency and ECB mode.

• Journal of the Korean Society of Systems Engineering
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• v.14 no.2
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• pp.73-82
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• 2018

In this work, a hardware based cryptographic module for the cyber security of nuclear power plant is developed using a system engineering approach. Nuclear power plants are isolated from the Internet, but as shown in the case of Iran, Man-in-the-middle attacks (MITM) could be a threat to the safety of the nuclear facilities. This FPGA-based module does not have an operating system and it provides protection as a firewall and mitigates the cyber threats. The encryption equipment consists of an encryption module, a decryption module, and interfaces for communication between modules and systems. The Advanced Encryption Standard (AES)-128, which is formally approved as top level by U.S. National Security Agency for cryptographic algorithms, is adopted. The development of the cyber security module is implemented in two main phases: reverse engineering and re-engineering. In the reverse engineering phase, the cyber security plan and system requirements are analyzed, and the AES algorithm is decomposed into functional units. In the re-engineering phase, we model the logical architecture using Vitech CORE9 software and simulate it with the Enhanced Functional Flow Block Diagram (EFFBD), which confirms the performance improvements of the hardware-based cryptographic module as compared to software based cryptography. Following this, the Hardware description language (HDL) code is developed and tested to verify the integrity of the code. Then, the developed code is implemented on the FPGA and connected to the personal computer through Recommended Standard (RS)-232 communication to perform validation of the developed component. For the future work, the developed FPGA based encryption equipment will be verified and validated in its expected operating environment by connecting it to the Advanced power reactor (APR)-1400 simulator.

• Journal of the Korean Mathematical Society
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• v.52 no.4
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• pp.797-819
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• 2015

A trapdoor discrete logarithm group is a cryptographic primitive with many applications, and an algorithm that allows discrete logarithm problems to be solved faster using a pre-computed table increases the practicality of using this primitive. Currently, the distinguished point method and one extension to this algorithm are the only pre-computation aided discrete logarithm problem solving algorithms appearing in the related literature. This work investigates the possibility of adopting other pre-computation matrix structures that were originally designed for used with cryptanalytic time memory tradeoff algorithms to work as pre-computation aided discrete logarithm problem solving algorithms. We find that the classical Hellman matrix structure leads to an algorithm that has performance advantages over the two existing algorithms.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.7
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• pp.3648-3663
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• 2017

With the development of cloud computing and widespread availability of mobile devices, outsourcing computation has gotten more and more attention in cloud computing services. The computation of bilinear pairing is the most expensive operation in pair-based cryptographic schemes. Currently, most of the algorithms for outsourcing bilinear pairing have small checkability or the outsourcers need to operate expensive computations. In this paper, we propose an efficient algorithm for outsourcing bilinear pairing with two servers, where the outsourcers can detect the errors with a probability of 1 if the cloud servers are dishonest, and the outsourcers are not involved in any complex computations. Finally, the performance evaluation demonstrates that the proposed algorithm is most efficient in all of fully verifiable outsourcing algorithms for bilinear pairing.

• Journal of the Korea Society of Computer and Information
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• v.3 no.2
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• pp.177-182
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• 1998

This paper proposes pure master key which can be commonly used in multi-cryptographic system. It also refer to master key condition for RSA public key cryptosystem using Format's theorem and master key algorithm as well.

• Proceedings of the Korean Information Science Society Conference
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• 2000.04a
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• pp.668-670
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• 2000

공개키 암호 알고리즘의 암호화 함수는 한 방향으로의 계산은 매우 쉬우나, 역 계산은 매우 어렵다는 일방향성과 특별한 정보를 가지면 역 계산이 가능하다는 트랩도어(trapdoor)성질이 있어야 하기 때문에 NP 문제나 계산상 풀기 어려운 수학 문제에 기반하여 연구되고 있다. 본 논문에서는 정수 계획법이라는 NP-완전 문제를 이용한 새로운 공개키 암호 알고리즘을 제안한다. 이 알고리즘의 키 생성 방식은 기존의 배낭꾸리기 암호 TTMXPA의 방식과 유사히지만 기존 시스템의 공격 대상이었던 비밀키가 가지는 취약성을 보완하였다.

• Proceedings of the Korea Institutes of Information Security and Cryptology Conference
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• 1992.11a
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• pp.165-179
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• 1992

영지식 대화증명은 인증자(prover)가 비밀정보를 노출시키지 않으면서, 검증자(verifier)와 대화를 통해서 이 비밀정보를 알고 있음을 검증자에게 증명하는 방법이다. 본 논문에서는 ElGamal 암호 알고리듬을 이용하여 메세지 전송과 개인 인중이 동시에 가능한 순방향 영지식 증명 프로토콜과 역방향 영지식 증명 프로토콜을 제안한다. 그리고 전송효율을 송신한 전비트와 정보비트와의 비로 정의하여 각각의 프로토콜의 전송효율을 계산한다.

• Proceedings of the Korea Information Processing Society Conference
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• 2019.05a
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• pp.133-136
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• 2019

본 고에서는 약 100 만건의 건강정보를 이용하여 3-Node MongoDB 플랫폼 환경에서 AES, 3DES, ARIA 암호 알고리즘을 이용하여 암호화를 적용하는 방법을 알아본다. 각각의 암호 알고리즘별로 YCSB 성능테스트 툴을 이용하여 다양한 Workload 별로 성능을 테스트를 수행한 뒤, 그 결과를 비교·정리한다.

• Review of KIISC
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• v.3 no.3
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• pp.31-39
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• 1993

IOS/IEC JTC1/SC27의 국제표준소개의 첫번째 편으로 DIS 9797을 소개한다. 이것은 1989년에 1차로 국제표준이 되었다가 결함이 발견되어 다시 작업이 시작되어 1992년 10월 SC27정기총회에서 CD(Committee Draft)에서 수정후 DIS(Draft Internationa Standard) 수준으로 올리기로 하여 1993년 3월 DIS로서 표결에 부쳐진 문서이다. 이해를 돕기 위하여 국문뒤에 원문을 덧붙였다. 번역이 적절하지 않거나 더 좋은 표현이 있으면 역자에게 알려주면 참고하여 추후의 수정본에 반영하겠다.

• The Journal of the Korea institute of electronic communication sciences
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• v.4 no.3
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• pp.217-223
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• 2009

Recently, the development of the various network method can generate serious social problems. So, it is highly required to control security of network. These problems related security will be developed and keep up to confront with anti-security field such as hacking, cracking. The way to preserve security from hacker or cracker without developing new cryptographic algorithm is keeping the state of anti-cryptanalysis in a prescribed time by means of extending key-length. In this paper, the proposed montgomery multiplication structured unit array method in carry generated part and variable length multiplication for eliminating bottle neck effect with the RSA cryptosystem. Therefore, this proposed montgomery multiplier enforce the real time processing and prevent outer cracking.