• Proceedings of the KIEE Conference
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• 1998.07c
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• pp.1053-1055
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• 1998

Using EMTP model which describes bipolar HVDC system, switching level simulation results are presented in this paper. Voltage synchronization at point of common coupling, gate pulse generation and current control loops are represented in TACS module. The system consists of 100 km submarine cable rated 300 MW and 12 pulse rectifier and inverter stations which are connected to equivalent three-phase sources and loads through the 154 kV AC lines, respectively. In convertor stations, harmonic filters and capacitor banks are equipped to cancel out the harmonics generated by converters and to supply the required reactive power.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• v.9 no.2
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• pp.208-211
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• 2005

This paper presents an ultra-low partial discharge(PD) measurement system that has been accepted as a non-destructive method to estimate electrical insulation of low-voltage electric devices. The PD measurement system is composed of a coupling network, a low noise amplifier, and associated electronics. A shielding box is used to make a better condition against electromagnetic interference. A low cut-off frequency of the coupling network was 1MHz(-3 dB). Calibration tests on laboratory set-up have shown that the PD measurement system has a stable sensitivity of 11.4mV/pC. In an application experiment on a low-voltage induction motor(5HP), we could detect 0.77pC level of partial discharge pulse at the applied voltage of AC 664 V$_{peak}$.

• Journal of Advanced Information Technology and Convergence
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• v.10 no.1
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• pp.37-43
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• 2020

This paper presents analysis of passive metal interconnection of the LNA block in CMOS integrated circuit. The performance of circuit is affected by the geometry of RF signal path. To investigate the effect of interconnection lines, a cascode LNA is designed, and circuit simulations with full-wave electromagnetic (EM) simulations are executed for different positions of a component. As the results, the position of an external capacitor (C_ex) changes the parasitic capacitance of electric coupling; the placement of component affects the circuit performance. This analysis of interconnection line is helpful to analyze the amount of electromagnetic coupling between the lines, and useful to choose the signal path in the layout design. The target of this work is the RF LNA enabling the seamless connection of wireless data network and the following standards have to be supported in multi-band (WCDMA: 2.11~ 2.17 GHz, CDMA200 1x : 1.84~1.87 GHz, WiBro : 2.3~2.4GHz) mobile application. This work has been simulated and verified by Cadence spectre RF tool and Ansoft HFSS. And also, this work has been implemented in a 0.13um RF CMOS technology process.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.879-891
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• 2009

Impedance of rails is increased by the magnetic coupling between rails and reinforcing bars in the concrete slab track. Currently, the current of track circuit has been compensated by installing the compensation capacitors on track circuit because of increasing the impedance of rails. In case of a rapid transit railway, the compensation capacitors are installed every 20[m] to compensate the current of track circuit in the concrete slab track. Because the interval of one block for a rapid transit railway is as long as 1500[m], the compensation capacitors are installed about the number of 70$\sim$75 on track circuit. However, in case the compensation capacitors are broken over the number of three, it is a problem that the amplitude of current is under standard amplitude of current which is 0.8[A]. In this paper, it was suggested installing a compensation capacitor by using resonance phenomenon on the concrete slab track. We represent the electrical model of track circuit and the four terminal network, calculate the parameters demanded for the electrical model in the concrete slab track. Also, we computed the position and capacitance of the compensation capacitor about 2040[Hz], 2400[Hz], 2760[Hz], 3120[Hz] which currently is the track circuit frequency in the Gyeongbu rapid transit railway and demonstrated the validity of it, using the Matlab and PSpice program.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.14 no.4
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• pp.338-347
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• 2021

In this paper, the beta-ray sensor circuit used in the true random number generator was designed using DB HiTek's 0.18㎛ CMOS process. The CSA circuit proposed a circuit having a function of selecting a PMOS feedback resistor and an NMOS feedback resistor, and a function of selecting a feedback capacitor of 50fF and 100fF. And for the pulse shaper circuit, a CR-RC2 pulse shaper circuit using a non-inverting amplifier was used. Since the OPAMP circuit used in this paper uses single power instead of dual power, we proposed a circuit in which the resistor of the CR circuit and one node of the capacitor of the RC circuit are connected to VCOM instead of GND. And since the output signal of the pulse shaper does not increase monotonically, even if the output signal of the comparator circuit generates multiple consecutive pulses, the monostable multivibrator circuit is used to prevent signal distortion. In addition, the CSA input terminal, VIN, and the beta-ray sensor output terminal are placed on the top and bottom of the silicon chip to reduce capacitive coupling noise between PCB traces.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.11
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• pp.130-137
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• 2013

This paper presents analog front-end(AFE) circuits for bio-potential measurement. The proposed AFE is composed of IA(instrument amplifier), BPF(band-pass filter), VGA(variable gain amplifier) and SAR(successive approximation register) type ADC. The low gm(LGM) circuits with current division technique and Miller capacitance with high gain amplifier enable IA to implement on-chip AC-coupling without external passive components. Spilt capacitor array with capacitor division technique and asynchronous control make the 12-b ADC with low power consumption and small die area. The total current consumption of proposed AFE is 6.3uA at 1.8V.

• Journal of the Korean Society of Safety
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• v.36 no.2
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• pp.10-17
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• 2021

This paper presents the robust design of each component used in the development of an induction bolt heating system for dismantling the high-temperature high-pressure casing heating bolts of turbines in power plants. The induction bolt heating system comprises seven assemblies, namely AC breaker, AC filter, inverter, transformer, work coil, cable, and CT/PT. For each of these assemblies, the various failure modes are identified by the failure mode and effects analysis (FMEA) method, and the causes and effects of these failure modes are presented. In addition, the risk priority numbers are deduced for the individual parts. To ensure robust design, the insulated-gate bipolar transistor (IGBT), switched-mode power supply (SMPS), C/T (adjusting current), capacitor, and coupling are selected. The IGBT is changed to a field-effect transistor (FET) to enhance the voltage applied to the induction heating system, and a dual-safety device is added to the SMPS. For C/T (adjusting current), the turns ratio is adjusted to ensure an appropriate amount of induced current. The capacitor is replaced by a product with heat resistance and durability; further, coupling with a water-resistant structure is improved such that the connecting parts are not easily destroyed. The ground connection is chosen for management priority.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.19 no.4
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• pp.470-476
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• 2008

In this paper, we describe the cause of TDMA noise and distinction method of TDMA noise source in a GSM mobile phone. The causes of TDMA noise are composed of RF(Radio Frequency) energy coupling and low frequency energy coupling by burst ripple. We propose the distinction method of TDMA noise source from output(TDMA noise measurement) and frequency response of a system(audio path). Especially we propose a method of insertion loss($S_{21}$) analysis and the improvement method for RF energy coupling. Capacitor(40 pF) is a solution to reduce RF energy coupling and therefore TDMA noise was reduced by 10 dB.

• Journal of Electrical Engineering and Technology
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• v.11 no.6
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• pp.1656-1663
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• 2016

A capacitive wireless power transfer (C-WPT) system uses an electric field to transmit power through a physical isolation barrier which forms a pair of ac link capacitors between the metal plates. However, the physical dimension and low dielectric constant of the interface medium severely limit the effective link capacitance to a level comparable to the main switch output capacitance of the transmitting circuit, which thus narrows the soft-switching range in the light load condition. Moreover, by fundamental limit analysis, it can be proved that such a low link capacitance increases operating frequency and capacitor voltage stress in the full load condition. In order to handle these problems, this paper investigates optimal design of double matching transformer networks for C-WPT. Using mathematical analysis with fundamental harmonic approximation, a design guideline is presented to avoid unnecessarily high frequency operation, to suppress the voltage stress on the link capacitors, and to achieve wide ZVS range even with low link capacitance. Simulation and hardware implementation are performed on a 5-W prototype system equipped with a 256-pF link capacitance and a 200-pF switch output capacitance. Results show that the proposed scheme ensures zero-voltage-switching from full load to 10% load, and the switching frequency and the link capacitor voltage stress are kept below 250 kHz and 452 V, respectively, in the full load condition.

• Proceedings of the KIEE Conference
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• 2000.07a
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• pp.259-261
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• 2000

UPFC(Unified Power Flow Controller) consists of two voltage sourced converter(VSC)s inserted into AC system through series and parallel coupling transformer, where two VSCs are linked by capacitor at DC-side. Since VSC acts as an AC voltage source behind a reactance, where both magnitude and phase angle of the source are controllable, UPFC can be represented by the equation related to input-output relation of two VSCs. Voltage control of DC-link capacitor provides the path of real power flow between two VSCs. While UPFC is controlled for maintaining the given reference value in steady state, it should be controlled for damping power oscillation in dynamics. For such a control objective, the control strategy based on the energy function was proposed and has been shown to be effect and robust for damping power oscillation of power system. In this paper, UPFC model based on the VSC was analysed and applied to power-flow control and stability analysis. The control strategy based on the energy function is adopted for damping power oscillation of power system. The effectiveness of proposed control strategy was verified by simulation study