• Title/Summary/Keyword: control board

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Physical and Mechanical Properties of Panels Fabricated with Particle and Fiber by Composition Types (구성형태(構成形態)에 따른 파티클과 파이버로 제조(製造)한 패널의 물리적 및 기계적 성질)

  • Yoon, Hyoung-Un;Lee, Phil-Woo
    • Journal of the Korean Wood Science and Technology
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    • v.20 no.2
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    • pp.9-22
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    • 1992
  • The aim of this research was to investigate physical and mechanical properties of various composition panels, each fabricated with a ratio of fiber to particle of 2 to 10. Type A consisted of fiber-faces and particle-core in layered-mat system. Type B consisted of fiberboard-faces on particleboard-core. Type C consisted of fibers and particles in mixed-mat system. The results obtained from tests of bending strength, internal bond, screw holding strength and stability were as follows: 1. The bending strength and internal bonding of both the Type A panel and the Type B panel were higher than those of the Type C panel and three-layered particle board. 2. The mechanical properties of the Type C panel showed the lowest values of all composition methods. It seems that the different compression ratios of the particle and fiber interrupted the densification of the fibers when hot pressed. 3. The dimensional stability of layered-mat system panels consising of fiber-faces and particle-core was better the than control particleboard. 4. In composition methods of particle and fiber, layered-composition method was more resonable than mixed-composition. The Type B panel had the highest mechanical properties of all the composition types. 5. The Type A panel was considered the ideal composition method because of its resistance to delamination between the particle-layer and the fiber-layer and because of its lower adhesive content and more effective manufa cturing process.

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A Study on the Ownership and Governance Structure of Fisheries Cooperative (수산업협동조합의 소유지배구조에 관한 연구)

  • 남수현
    • The Journal of Fisheries Business Administration
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    • v.33 no.2
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    • pp.99-125
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    • 2002
  • Fisheries cooperative requires dual characteristics in performing its original function. Economic characteristic as an business enterprise and democratic characteristic as cooperative entity need to complete its objectives and survive in the complex rapidly-changing environment. After IMF crisis, fisheries cooperative received enormous government's financial support and credit-business department is perfectly under government's control. Regional fisheries cooperative also faces business failure, therefore pure cooperative movement can't save the fisheries cooperative. Economic characteristic as an business enterprise is more emphasized than democratic characteristic as cooperative entity in recent years. The theory of corporate ownership and governance can be applied to explain the ownership and governance of fisheries cooperative because fisheries cooperative is now similar to an business enterprise. During the IMF crisis the board, the auditors and the minority shareholders in business enterprise were revealed to be powerless against the mighty influence of controlling shareholders. Unconstrained discretion exercised by those controlling shareholders not only led to the firms'insolvency, but also brought down the country's financial system. During the past few years, Korea has experienced many institutional changes regarding its corporate governance structure. The introduction of outside directors, the strengthening of minority shareholders' rights, and enhanced accounting transparency are achieved to improve the efficiency of economic system. Investors, including institutional and individual, also seem to be more aware of governance issues now. Credit-business department of fisheries cooperative is recommended to introduce the institutions same as the case of the corporate governance structure. Fisheries cooperative except economic and credit-business department requires other prescriptions because it is emphasized as democratic cooperative entity. But we should be careful to interpret the ownership and governance structure because they are products of nations, eras and organizations.

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Detection of Misfire in Car Engines using Walsh Discrete Fourier Transform (WDFT를 이용한 자동차 엔진의 실화검출)

  • 김종부;이태표;오정수;임국현
    • Journal of the Korean Institute of Telematics and Electronics T
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    • v.35T no.1
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    • pp.67-74
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    • 1998
  • The primary cause of air pollution by vehicles is imperfect combustion of fuel. One of the most usual causes of this imperfect combustion is the misfire in IC engins. The U.S. EPA(Environment Protection Agency) and the CARB(California air Resources Board) have imposed regulations for the detection of misfiring in automotive engines. The OBD-II regulations require that misfire should be monitored by the engine diagnostic system, and that the goal of OBD-II is to alert the driver to the presence of a malfunction of the emission control system. Several solutions to the misfire detection problem have been proposed for the detection of misfires. However, the performance of these methods in the presence of misfire is not altogether clear. This paper presents a precise method and system for internal combustion engine misfire. Present invention based upon measurements of engine roughness as derived from crankshaft angular velocity measurements with special signal processing method. Crankshaft angular velocity signals are processed by WDPT, so that the more reliable misfire detection than the time domain analysis. Experimental work confirms that it is possible to apply the WDFT for the detection of misfires in no-load idle and road testing.

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A Programmable Doppler Processor Using a Multiple-DSP Board (다중 DSP 보드를 이용한 프로그램 가능한 도플러 처리기)

  • 신현익;김환우
    • Journal of the Institute of Electronics Engineers of Korea SC
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    • v.40 no.5
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    • pp.333-340
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    • 2003
  • Doppler processing is the heart of pulsed Doppler radar. It gives a clutter elimination and coherent integration. With the improvement of digital signal processors (DPSs), the implementation using them is more widely used in radar systems. Generally, so as for Doppler processor to process the input data in real time, a parallel processing concept using multiple DSPs should be used. This paper implements a programmable Doppler processor, which consists of MTI filter, DFB and square-law detector, using 8 ADSP21060s. Formulating the distribution time of the input data, the transfer time of the output data and the time required to compute each algorithm, it estimates total processing time and the number of required DSP. Finally, using the TSG that provides radar control pulses and simulated target signals, performances of the implemented Doppler processor are evaluated.

Gaze Effects on Spatial and Kinematic Characteristics in Pointing to a Remembered Target

  • Ryu, Young-Uk;Kim, Won-Dae;Kim, Hyeong-Dong
    • Physical Therapy Korea
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    • v.13 no.4
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    • pp.23-29
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    • 2006
  • The purpose of the present study was to examine gaze effects on spatial and kinematic characteristics during a pointing task. Subjects were asked to watch and point to an aimed target (2 mm in diameter) displayed on a vertically mounted board. Four gaze conditions were developed as combinations of "seeing-aiming" in terms of the eye movements: Focal-Focal (F-F), Focal-Fixing (F-X), Fixing-Focal (X-F), and Fixing-Fixing (X-X). Both the home target and an aimed target were presented for 1 second and then were disappeared in F-F and X-F. In X-F and X-X, only an aimed target disappeared after 1 second. Subjects were asked to point (with index finger tip) to an aimed target accurately as soon as the aimed target was removed. A significant main effect of gaze was found (p<.01) for normalized movement time. Peripheral retina targets had significantly larger absolute error compared to central retina targets on the x (medio-lateral) and z (superior-inferior) axes (p<.01). A significant undershooting to peripheral retina targets on the x axis was found (p<.01). F-F and X-F had larger peak velocities compared to F-X and X-X (p<.01). F-F and X-F were characterized by more time spent in the deceleration phase compared to F-X and X-X (p<.01). The present study demonstrates that central vision utilizes a form of on-line visual processing to reach to an object, and thus increases spatial accuracy. However, peripheral vision utilizes a relatively off-line visual processing with a dependency on proprioceptive information.

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Compensation Algorithm of Beamforming Error for Wideband Conformal Array Antenna (광대역 컨포멀 위상 배열 안테나의 빔형성 열화 보상 알고리즘)

  • Yoon, Ho-Joon;Lee, Kang-In;Nam, Sang-Wook;Chung, Young-Seek;Yoon, Young-Joong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.28 no.6
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    • pp.478-486
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    • 2017
  • In this paper, we propose an algorithm for the wideband beamforming in a conformal phased array antenna by compensating the errors. For the wideband beamforming, we used the True Time Delay(TTD), which was fabricated on the RF circuit board to obtain long delay lines. Beamforming errors in the conformal array antenna are the mutual coupling between the array elements, the dispersive error in the TTD circuit, and the quantization error by the digital control. We apply the compensation algorithm to the conformal phased array antenna of wideband 2~4 GHz, and verify the usefulness by comparing the results with the experiment results.

Run-Time Hardware Trojans Detection Using On-Chip Bus for System-on-Chip Design (온칩버스를 이용한 런타임 하드웨어 트로이 목마 검출 SoC 설계)

  • Kanda, Guard;Park, Seungyong;Ryoo, Kwangki
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.20 no.2
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    • pp.343-350
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    • 2016
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connects (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 39K at an operating frequency of 313MHz using the $0.13{\mu}m$ TSMC process.

Design of Smart Frame SoC to support the IoT Services (IoT 서비스를 지원하는 Smart Frame SoC 설계)

  • Yang, Dong-hun;Hwang, In-han;Kim, A-ra;Guard, Kanda;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.503-506
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    • 2015
  • In accordance with IoT(Internet of Things) commercialization, the need to design SoC-based hardware platform with wireless communication is increasing. This paper therefor proposes an SoC platform architecture with Smart Frame System inter-communicating between devices. Wireless communication functions and high-performance real-time image processing hardware structure was applied to existing digital photo frame. We developed a smart phone application to control the smart frame through Bluetooth communication. The SoC platform hardware consists of CIS controller, Memory controller, ISP(Image Signal Processing) module for image scaling, Bluetooth Interface for inter-communicating between devices, VGA/TFT-LCD controller for displaying video. The Smart Frame System to support the IoT services was implemented and verified using HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA. The operating frequency is 54MHz.

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SoC Design for Malicious Circuit Attack Detection Using on-Chip Bus (온칩버스를 이용한 악성 회로 공격 탐지 SoC 설계)

  • Guard, Kanda;Ryoo, Kwang-ki
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.885-888
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    • 2015
  • A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connect (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 40K at an operating frequency of 250MHz using the $0.13{\mu}m$ TSMC process.

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Risk Management and Telecommunications Research for customers of the accident location (사고선박의 고객위치파악용 위험관리 통신연구)

  • Kwak, Eun-young;Park, Dea-woo
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.05a
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    • pp.331-335
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    • 2016
  • When a boating accident, such as a January number three, the customer's risk management issues emerged. Ships and accident risk in confined spaces such as risk management to locate the customer and dangers of probation is available. In this paper, aboard after consent to obtain information for customers to wrist to customers, webbing or portable device embedded in devices and Wireless sensor information Input was attached, disposable consumer information. Customer on board the ship setting for location analysis and positioning according to information communication protocol, ships, each customer's real-time location information on the screen, 3 the foundation of d customers on the floor Can be designed to inform. Threshold designed to reduce the error of the information to analyze the position in current position and errors. Also, to system attacks would control the situation of accident and emergency jaenanguk server with real-time information transmission of information outside the emergency during a disaster, search and Disaster relief to be possible.

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