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http://dx.doi.org/10.6109/jkiice.2016.20.2.343

Run-Time Hardware Trojans Detection Using On-Chip Bus for System-on-Chip Design  

Kanda, Guard (Department of Information and Communication Engineering, Hanbat National University)
Park, Seungyong (Department of Information and Communication Engineering, Hanbat National University)
Ryoo, Kwangki (Department of Information and Communication Engineering, Hanbat National University)
Publication Information
Journal of the Korea Institute of Information and Communication Engineering / v.20, no.2, 2016 , pp. 343-350 More about this Journal
Abstract
A secure and effective on-chip bus for detecting and preventing malicious attacks by infected IPs is presented in this paper. Most system inter-connects (on-chip bus) are vulnerable to hardware Trojan (Malware) attack because all data and control signals are routed. A proposed secure bus with modifications in arbitration, address decoding, and wrapping for bus master and slaves is designed using the Advanced High-Performance and Advance Peripheral Bus (AHB and APB Bus). It is implemented with the concept that arbiter checks share of masters and manage infected masters and slaves in every transaction. The proposed hardware is designed with the Xilinx 14.7 ISE and verified using the HBE-SoC-IPD test board equipped with Virtex4 XC4VLX80 FPGA device. The design has a total gate count of 39K at an operating frequency of 313MHz using the $0.13{\mu}m$ TSMC process.
Keywords
AHB Bus; Hardware Trojan Horse; IP; Malware; SoC;
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  • Reference
1 DARPA BAA 07 - 24 - solicitations-microsystems technology office [Internet]. Available : http://www.darpa.mil/mto/solicitations/baa07-24/index.html
2 M Tehranipoor, H Salmani X. Zhang, Integrated Circuit Authentication, Springer publishers, 2014.
3 Bhunia et al.: "Hardware Trojan Attacks: Threat Analysis and Countermeasures," in Proceedings of the IEEE, vol 102, no.8, pp 1229-1247, Aug. 2014.   DOI
4 M. Tehranipoor and F. Koushanfar, "A Survey of Hardware Trojan Taxonomy and Detection," in the IEEE Design & Test of Computers, vol.27, no.1, pp. 10-25, Feb. 2010.
5 S. Adee, "The hunt for the kill switch," Spectr. IEEE 45 (5) May (2008) 34-39
6 Y. Alkabani and F. Koushanfar, "Consistency-based characterization for IC Trojan detection," in Proceedings of International Conference on Computer-Aided Design, pp. 123-127, Nov. 2009.
7 D. Agrawal, S. Baktir, D. Karakoyunlu, P. Rohatgi and B. Sunar, "Trojan Detection using IC Fingerprinting," in Proceedings of the Symposium on Security and Privacy, pp. 296-310, May 2007.
8 Y. Jin and Y. Makris, "Hardware Trojan Detection using Path Delay Fingerprint," in Proceedings of the IEEE International Workshop on Hardware-Oriented Security and Trust (HOST 2008), pp. 51-57, Jun. 2008.
9 L.W. Kim and J. D. Villasenor, "A System -On-Chip Bus Architecture for Thwarting Integrated Circuit Trojan Horses" IEEE transaction on VLSI, Oct. 2011.