• Journal of the Korean Institute of Telematics and Electronics B
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• v.32B no.5
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• pp.702-709
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• 1995

Conditional branch instructions are a major obstacle to the increasing of RISC processor performance, because they can break the smooth flow of instructions; the issuing of instructions after a branch instruction must often wait until the condition is resolved. This paper proposes a hardware scheme which has a duplicated fetching logic to reduce the penalty imposed by conditional branch instructions. The proposed shceme has a buffer to maintain states of processor, which supports the precise interrupt. We make use of two code segments to test the performance and their results were compared with those of the delayed branch. We got the result that the proposed scheme reduces the branch penalty extremely.

• Earthquakes and Structures
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• v.11 no.1
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• pp.109-127
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• 2016

This paper examines the contribution of three sources of uncertainties to probabilistic seismic behaviour of wood frame buildings, including ground motions, intensity and seismic mass. This sensitivity analysis is performed using three methods, including the traditional method based on the conditional distributions of ground motions at given intensity measures, a method using the summation of conditional distributions at given ground motion records, and the Monte Carlo simulation. FEMA P-695 ground motions and its scaling methods are used in the analysis. Two archetype buildings are used in the sensitivity analysis, including a two-storey building and a four-storey building. The results of these analyses indicate that using data-fitting techniques to obtain probability distributions may cause some errors. Linear interpolation combined with data-fitting technique may be employed to improve the accuracy of the calculated exceeding probability. The procedures can be used to quantify the risk of wood frame buildings in seismic events and to calibrate seismic design provisions towards design code improvement.

• ETRI Journal
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• v.37 no.5
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• pp.1012-1022
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• 2015

Conventional cryptographic algorithms are not sufficient to protect secret keys and data in white-box environments, where an attacker has full visibility and control over an executing software code. For this reason, cryptographic algorithms have been redesigned to be resistant to white-box attacks. The first white-box AES (WB-AES) implementation was thought to provide reliable security in that all brute force attacks are infeasible even in white-box environments; however, this proved not to be the case. In particular, Billet and others presented a cryptanalysis of WB-AES with 230 time complexity, and Michiels and others generalized it for all substitution-linear transformation ciphers. Recently, a collision-based cryptanalysis was also reported. In this paper, we revisit Chow and others's first WB-AES implementation and present a conditional re-encoding method for cryptanalysis protection. The experimental results show that there is approximately a 57% increase in the memory requirement and a 20% increase in execution speed.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.24 no.3
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• pp.437-444
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• 2014

In this paper, we introduce a Graph based Binary Code Execution Path Exploration Platform. In the graph, a node is defined as a conditional branch instruction, and an edge is defined as the other instructions. We implemented prototype of the proposed method and works well on real binary code. Experimental results show proposed method correctly explores execution path of target binary code. We expect our method can help Software Assurance, Secure Programming, and Malware Analysis more correct and efficient.

• The Journal of the Korea Contents Association
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• v.7 no.12
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• pp.262-272
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• 2007

SAD (Sum of Absolute Difference) algorithm is the most frequently executing routine in motion estimation, which is the most demanding process in motion picture encoding. To enhance the performance of motion picture encoding on a VLIW processor, an optimal implementation of SAD algorithm on VLIW processor should be accomplished. In this paper, we propose an implementation of optimal scheduling of SAD algorithm with conditional branch on a VLIW-based high performance DSP. We first transform the nested loop with conditional branch of SAD algorithm into a single loop with conditional branch which has a large enough loop body to utilize fully the ILP capability of VLIW DSP and has a conditional branch to make the escape from loop to be achieved as soon as possible. And then we apply a modulo scheduling technique to the transformed single loop. We test the proposed implementation on TMS320C6713, and analyze the code size and performance with respect to processing time. Through experiments, it is shown that the SAD implementation proposed in this paper has small code size appropriate for embedded applications, and the H.263 encoder with the proposed SAD implementation performs better than other H.263 encoder with other SAD implementations.

• Journal of Arbitration Studies
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• v.8 no.1
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• pp.293-322
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• 1998

General Administrative Procedures of the Preshipment Inspection 1. Initial notification Preshipment Inspection is initiated by Agency when it receives notice either from the importing country, or the seller, that an export needs to be imspected 1.1 Notice from the importing country 1.2 Notice from the seller 2. Preliminary price verification After receipt of initial notification, Agency undertakes, Where possible, a preliminary price verification, based upon the Inspection Order and other contractual documents received. 3. Customs classification When required by the Government of the importing country. Agency forms an opinion of the Customs Classification Code based upon the Customs Tariff Book and Rules of Classification of the country of importation. The Customs Classification Code determines the tariff rate on the basis of which the importer will be required to pay import duties. 4. Import eligibility 5. Arrangements for physical inspection 5.1 Inspection request from seller 5.2 Place of inspection 5.3 Date of inspection 5.4 Physical inspection procedures 6. Physical inspection results When the physical inspection is completed, the inspector submits his report to the Agency office and the result of inspection will be communicated to the seller and, where applicable, the place of inspection. The result will state: satisfactory or conditional of unsatisfactory. The seller is welcome to present his views in writting to Agency in the event there is any query regarding the issuance of a conditional of unsatisfactory inspection result. 6.1 Satisfactory 6.2 Conditional 6.3 Unsatisfactory 7. Shipment of the goods The seller is advised to check with Agency prior to shipment if the physical inspection result has not been received or there are any doubts concerning whether a Clean Report of Findings will be issued. 8. Final price verification and classification Based on the results of physical inspection and appropriate final documents, Agency finalises the price verification and the Agency opinion of Customs classification code. When the preliminary price verification has not resulted in any unresolved questions and the inspection result and other documents received are consistent with the preliminary documentation, Agency will not normally require any additional information. The main exception would be if the terms of sale require reference to prices at the date of shipment. 9. The Report of Findings 9.1 Types of Reports of Findings - Clean Reports of Findings(CRF) The Agency will issue a Clean Reports of Findings(CRF), or equivalent document, normally within two working days after receipt of the necessary correct final documents and a satisfactory result in all aspects of the inspection. - Discrepancy Report.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.105-108
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• 2001

4 32-bit RISC core is designed for embedded application and DSP. This processor offers low power consumption by fully static operation and compact code size by efficient instruction set. Processor performance is improved by wing conditional instruction execution, block data transfer instruction, multiplication instruction, bunked register file structure. To support compact code size of embedded application, It is capable cf executing both 16-bit instructions and 32-bit instruction through mixed mode instruction conversion Furthermore, for fast MAC operation for DSP applications, the processor has a dedicated hardware multiplier, which can complete a 32-bit by 32-bit integer multiplication within seven clock cycles. These result in high instruction throughput and real-time interrupt response. This chip is implemented with 0.35${\mu}{\textrm}{m}$, 4- metal CMOS technology and consists of about 50K gate equivalents.

• Wind and Structures
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• v.4 no.5
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• pp.413-440
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• 2001

This paper presents an extensive analysis of unsteady wind loading data on a 18 m long and 2 m high wall in a rural environment, with the wind at a range of angles to the wall normal. The data is firstly analyzed using standard statistical techniques (moments of probability distributions, auto- and cross-correlations, auto- and cross-spectra etc.). The analysis is taken further using a variety of less conventional methods - conditional sampling, proper orthogonal decomposition and wavelet analysis. It is shown that, even though the geometry is simple, the nature of the unsteady flow is surprisingly complex. The fluctuating pressures on the front face of the wall are to a great extent caused by the turbulent fluctuations in the upstream flow, and reflect the oncoming flow structures. The results further suggest that there are distinct structures in the oncoming flow with a variety of scales, and that the second order quasi-steady approach can predict the pressure fluctuations quite well. The fluctuating pressures on the rear face are also influenced by the fluctuations in the oncoming turbulence, but also by unsteady fluctuations due to wake unsteadiness. These fluctuations have a greater temporal and spatial coherence than on the front face and the quasi-steady method over-predicts the extent of these fluctuations. Finally the results are used to check some assumptions made in the current UK wind loading code of practice.

• Journal of the Korea Institute of Information Security & Cryptology
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• v.29 no.1
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• pp.67-75
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• 2019

When a Solidity smart contract has a problem in calling a function of another contract, the fallback function is supposed to be executed automatically. However, it may be are arbitrarily created, with their behaviors unknown to developers, and fallback function execution is vulnerable to exploits by attackers. in In this paper, we propose a preprocessing based method to reduce the risk with less overhead of developers'. Developers mark the intention using the newly defined keywords in this paper, and the preprocessor reduces the risk by preprocessing the conditional variables and conditional statements according to the keywords.

• Nuclear Engineering and Technology
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• v.49 no.2
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• pp.395-403
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• 2017

An efficient evaluation method for the probability of a tornado missile strike without using the Monte Carlo method is proposed in this paper. A major part of the proposed probability evaluation is based on numerical results computed using an in-house code, Tornado-borne missile analysis code, which enables us to evaluate the liftoff and flight behaviors of unconstrained objects on the ground driven by a tornado. Using the Tornado-borne missile analysis code, we can obtain a stochastic correlation between local wind speed and flight distance of each object, and this stochastic correlation is used to evaluate the conditional strike probability, $Q_V(r)$, of a missile located at position r, where the local wind speed is V. In contrast, the annual exceedance probability of local wind speed, which can be computed using a tornado hazard analysis code, is used to derive the probability density function, p(V). Then, we finally obtain the annual probability of tornado missile strike on a structure with the convolutional integration of product of $Q_V(r)$ and p(V) over V. The evaluation method is applied to a simple problem to qualitatively confirm the validity, and to quantitatively verify the results for two extreme cases in which an object is located just in the vicinity of or far away from the structure.