• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2000년도 전력전자학술대회 논문집
• /
• pp.186-190
• /
• 2000

This paper propose a "Active common-mode voltage damper circuit" that capable of a suppression of a common-mode voltage produced in the PWM VSI. The four level half-bridge PWM inverter circuit and common-mode transformer are incorporated into the "Active common-mode voltage damper" the design method of which is presented Effect of "Active common-mode voltage damper" in this paper verifies a propriety and effectiveness in 2.2[kW] induction motor drive using IGBT inverter. Experimental results show that "common-mode voltage damper" makes contributions to reducing a high frequency leakage current and common-mode voltage.leakage current and common-mode voltage.

• 한국항행학회논문지
• /
• 제28권2호
• /
• pp.246-249
• /
• 2024

In this paper, we present a miniaturized differential line (DL) using inductance-enhanced corrugated ground planes (LCGP) for effective common-mode (CM) noise suppression in high-speed packages and printed circuit boards. The LCGP-DL demonstrates the CM noise suppression in the frequency range from 2.09 GHz to 3.6 GHz. Furthermore, to achieve the same low cutoff frequency, the LCGP-DL accomplishes a remarkable 23.2% reduction in size compared to a reference DL.

• ETRI Journal
• /
• 제31권4호
• /
• pp.475-477
• /
• 2009

A balanced dual-band bandpass filter based on ${\lambda}$/2 stepped-impedance resonators and open-loop resonators is proposed in this letter. By employing a type of self-feedback structure, an extra transmission zero is introduced near the common-mode resonance frequency, and the common-mode signal is suppressed. The measured results indicate that the filter can operate in 2.46 GHz and 5.6 GHz bands, and the insertion loss is 1.85 dB and 1.9 dB, respectively. Also, better common-mode suppression is achieved.

• 한국전자파학회논문지
• /
• 제29권2호
• /
• pp.142-145
• /
• 2018

본 논문에서는 전원보드의 공통모드 노이즈 감쇠를 위한 디커플링 커패시터 회로를 효율적으로 시뮬레이션할 수 있는 구조분할 해석기법을 제시한다. 제시하는 구조분할 해석기법이 적용된 전원보드 설계에서는 보드를 두 부분으로 구조분할하였으며, 분할된 구조와 커패시터 회로의 임피던스 파라미터를 재결합하기 위한 방법을 제시하였다. 구조분할 해석기법을 적용함으로써 공통모드 노이즈 감쇠 시뮬레이션에 수행되는 시간을 46 % 이상 단축하였다.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2001년도 전력전자학술대회 논문집
• /
• pp.151-154
• /
• 2001

This paper propose a new active common-mode voltage damper circuit that is capable of suppressing a common-mode voltage produced in the PWM VSI. The new active common mode voltage damper is consisted of a half-bridge inverter and a common mode transformer with a blocking capacitor. Principle of the active common mode damper is as follow; by applying the compensation voltage which has the same amplitude and opposite polarity to the PWM inverter system. So, common mode voltage and high frequency leakage current can be reduced. Simulated and experimental results show that common-mode voltage damper makes contributions to reducing a high frequency leakage current and common-mode voltage.

• 한국항행학회논문지
• /
• 제15권4호
• /
• pp.571-577
• /
• 2011

본 논문은 차동 모드로 동작하는 메타 재질 구조를 바탕으로 평형 필터 설계를 제안한 것이다. 이 메타 재질 구조는 차동 모드 동작에서는 Composite Right/Left-Handed(CRLH) 메타 재질로 동작하여 필터 특성을 갖지만, 공통 모드에서는 통과대역이 차단되는 성질을 갖는 평형 CRLH 단위 셀로 구성되었다. 이러한 차동모드 특성을 갖는 단위 셀을 직렬로 4단을 연결하여 필터를 구성하였으며, 제안된 메타 재질의 특성은 차동 모드 평형 필터로 동작하고, 공통 모드에서는 차단되는 특성을 실험 결과를 통하여 확인하였다. 메타 재질을 이용한 평형 필터는 대역폭이 960 MHz~1000 MHz, 4.1dB의 삽입손실을 갖는 특성을 얻었다.

• 대한전자공학회:학술대회논문집
• /
• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
• /
• pp.1053-1056
• /
• 2003

A distortion suppression technology for employing multiple inputs in 3n+1 type current mode Max circuit is proposed using the adjustment of transconductance. If the number of inputs in current mode Max circuit increases, the high frequency distortion in the output signal grows. In this paper, it has been disclosed that the distortion in the multiple input Max circuit is proportional to sum of parasitic capacitance in input terminals, to the derivative of the output signal and also to the inverse of transconductance of the common diode-connected transistor. The proposed idea is by employing as larger transconductance of the common diode-connected transistor as possible. The effectiveness of the proposed idea has been proved through the HSPICE simulation.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2004년도 하계학술대회 논문집 B
• /
• pp.1232-1234
• /
• 2004

In this paper, we represent both occurrence reason of Surge-voltage and Leakage current of AC drive system which is operated by Voltage-type PWM Inverter. It generates a compensating voltage which has the same amplitude as, but the opposite phase to, the common-mode voltage produced by the PWM inverter. The compensating voltage is superimposed on the inverter output by a common-mode transformer. As a result, the common-mode voltage applied to the load is canceled completely. The design method of the active common-mode noise canceler is also presented in detail. Therefore, we try to describe the method controling both of them and all of the proprieties are proved by our experiment.

• ETRI Journal
• /
• 제35권5호
• /
• pp.827-837
• /
• 2013

In this paper, we present wideband common-mode (CM) noise suppression using a vertical stepped impedance electromagnetic bandgap (VSI-EBG) structure for high-speed differential signals in multilayer printed circuit boards. This technique is an original design that enables us to apply the VSI-EBG structure to differential signals without sacrificing the differential characteristics. In addition, the analytical dispersion equations for the bandgap prediction of the CM propagation in the VSIEBG structure are extracted, and the closed-form expressions for the bandgap cutoff frequencies are derived. Based on the dispersion equations, the effects of the impedance ratio, the EBG patch length, and via inductances on the bandgap of the VSI-EBG structure for differential signals are thoroughly examined. The proposed dispersion equations are verified through agreement with the full-wave simulation results. It is experimentally demonstrated that the proposed VSI-EBG structure for differential signaling suppresses the CM noise in the wideband frequency range without degrading the differential characteristics.

• 대한전자공학회논문지SD
• /
• 제40권11호
• /
• pp.37-44
• /
• 2003

다수의 입력을 필요로 하는 전류모드 Max 회로에서 고주파 왜곡을 효과적으로 억제할 수 있는 trans conductance 조정 방법을 제안하였다. Max 회로에 인가되는 입력 신호의 개수가 증가하면, 기생 커패시턴스는 입력 단의 개수에 비례하여 누적되게 된다. 본 연구에서는 Max 회로의 왜곡 신호의 크기가 누적된 기생 커패시턴스와 출력신호의 변화율에 비례하며, 공통 다이오드결선 트랜지스터의 transconductance 값에 반비례하게 됨을 밝혔다. 왜곡 억제를 위한 효과적인 방안으로 공통 다이오드결선 트랜지스터의 transconductance 값을 최소화하는 방안을 제시하였다. 이 방법의 효용성은 다양한 수의 입력 신호를 갖는 전류모드 Max 회로에 대해서 HSPICE 시뮬레이션을 통해 입증하였다.