• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 전력전자학술대회 논문집
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• pp.383-384
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• 2015

This paper presents a new space vector modulation (SVM) method for indirect matrix converters (IMCs) to reduce commonmode voltage as well as minimize output current ripple in a high voltage transfer ratio. In the proposed SVM, the three-vector modulation scheme is used in the rectifier stage, while the nonzero state modulation technique, where the three nearest active vectors are selected to synthesize the desired output voltage, is applied to inverter stage to reduce the CMV. The proposed SVM method can significantly reduce the output current ripple and common-mode voltage of the IMC without any extra hardware. Simulated results are provided to demonstrate the effectiveness of the proposed SVM method.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2015년도 추계학술대회 논문집
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• pp.209-210
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• 2015

This paper presents a new model predictive control method without the effect of a weighting factor in order to reduce common-mode voltage (CMV) for a three-phase voltage source inverter (VSI). By utilizing two active states with same dwell time during a sampling period instead of one state used in conventional method, the proposed method can reduce the CMV of VSI without the weighting factor. Simulation is carried out to verify the effectiveness of the proposed predictive control method with the aid of PSIM software.

• Journal of Power Electronics
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• 제14권2호
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• pp.315-323
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• 2014

An optimized space vector pulse width modulation (SVPWM) method with common mode voltage elimination and neutral point potential balancing is proposed for an open-end winding induction motor. The motor is fed from both of the ends with two neutral point clamped (NPC) three-level inverters. In order to eliminate the common mode voltage of the motor ends and balance the neutral point potential of the DC link, only zero common mode voltage vectors are used and a balancing control factor is gained from calculation in the strategy. In order to improve the harmonic characteristics of the output voltages and currents, the balancing control factor is regulated properly and the theoretical analysis is provided. Simulation and experimental results show that by adopting the proposed method, the common mode voltage can be completely eliminated, the neutral point potential can be accurately balanced and the harmonic performance for the output voltages and currents can be effectively improved.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1998년도 하계학술대회 논문집 F
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• pp.1882-1885
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• 1998

This paper proposes the advanced PWM method which can reduce common-mode voltage in 3 phase PWM converter/inverter system. By shifting the zero voltage vector of inverter in a sampling period, it is possible to cancel out a common-mode voltage pulse defined by switching functions of converter and inverter. Without any loss of control performance of converter/inverter system, overall common-mode voltage can be reduced by one-third compared with that of conventional PWM scheme.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 춘계학술대회 논문집 디스플레이 광소자 분야
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• pp.165-168
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• 2000

An active-matrix LCD using thin film transistors (TFT) has been widely recognized as having potential for high-quality color fiat-panel displays. Pixel-Design Array Simulation Tool (PDAST) was used to profoundly understand the gate signal distortion and pixel charging capability, which are the most critical limiting factors for high-quality TFT-LCDs. In addition, PDAST can estimate voltage distributions in common electrode which can affect pixel voltage and feed-through voltage. Since PDAST can simulate the gate, data and the pixel voltages of a certain pixel on TFT array at any time and at any location on an array, the effect of common electrode voltage can be effectively analyzed. The information obtained from this study could be utilized to design the larger area and finer image quality panel.

• 전력전자학회논문지
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• 제9권5호
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• pp.507-515
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• 2004

고속 스위칭 소자의 출현과 함께 높은 전압 상승률(dv/dt)은 PWM 인버터에 EMI 노이즈 및 축 전압 그리고 베어링 누설전류 등의 문제 등을 발생시키고 있다. 본 논문에서는 유도전동기 시스템에서의 새롭게 개발된 전도성 EMI 저감 SVPWM 기법의 응용에 대하여 기술한다. 새롭게 개발된 커먼모드 전압제거 SVPWM 기법은 인버터 제어에 있어서 영벡터 상태를 사용하지 않고 종래의 PWM 기법에 비하여 커먼모드 전압의 감소가 가능하다. 소프트웨어 접근에 의한 제안된 기법의 타당성은 시뮬레이션과 실험적 결과를 통하여 확인하였다.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2005년도 International Meeting on Information Displayvol.II
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• pp.1258-1261
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• 2005

The ramp type bias voltage applied to the common electrode during a reset-period is newly proposed to lower the background luminance and to improve the address discharge characteristics in AC-PDP. The positive ramp bias voltage is applied during the ramp-up period, whereas the negative ramp bias voltage is applied during the ramp-down period. The effects of the voltage slopes in both the positive and negative ramp bias voltages on the background luminance and address voltage characteristics are examined intensively. It is observed that the optimized positive and negative ramp bias voltages applied to the common electrode during the ramp-period can lower the background luminance and also enhance the address discharge characteristics of the AC-PDP.

• Journal of Power Electronics
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• 제11권1호
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• pp.21-27
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• 2011

In this paper, an approach to reduce common-mode voltage (CMV) at the output of multilevel inverters using a phase opposition disposed (POD) sinusoidal pulse width modulation (SPWM) technique is proposed. The SPWM technique does not require computations therefore, this technique is easy to implement on-line in digital controllers. A good tradeoff between the quality of the output voltage and the magnitude of the CMV is achieved in this paper. This paper realizes the implementation of a POD-SPWM technique to reduce CMV using a five-level diode clamped inverter for a three phase induction motor. Experimental and simulation results demonstrate the feasibility of the proposed technique.

• 전력전자학회논문지
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• 제21권2호
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• pp.126-133
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• 2016

This paper proposes a new PWM method to reduce the common mode voltage change in three-level Vienna rectifier. This new proposed PWM method uses medium voltage vector for the three-level Vienna rectifier to determine the sum of three-phase voltage zero, and the common mode voltage variation is decreased. Using the carrier comparison method, the switching function generator for three-level Vienna rectifier has been proposed. The effects of the proposed PWM method have been verified through simulation using the PSIM.

• Journal of Power Electronics
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• 제19권6호
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• pp.1582-1590
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• 2019

A new method for reducing the common-mode current generated by the voltage variations in a two-inverter air conditioner system by applying a synchronized pulse-width modulation (PWM) strategy is proposed. The PWM signals of the master-mode inverter are generated based on the reference voltage, while those of the slave-mode inverter are output in the opposite direction when the master-mode inverter changes its switching state. However, the slave-mode control results in a mismatch between the reference voltage and the actual output voltage that is modified by synchronized control operation. The proposed method is capable of reducing and controlling this voltage error by performing signal selection in the vector space of the slave-mode inverter, which mitigates the distortion of the phase current. The efficacy of this method in reducing conducted emissions has been validated both theoretically and experimentally.