• The Journal of the Korea Contents Association
• /
• v.7 no.12
• /
• pp.322-332
• /
• 2007

We consider a deformation method suitable for fractal. In IFS fractal, the position of a point is characterized by its code as well as by its coordinates. Code has a meaning of address for fractal. If we move a point by changing its code, the resulting movement shows fractal behavior. We propose three deformation methods based on code information. For the deformation vector of a point in fractal, 1) we use the vector of a given vector field at the point obtained by code transformation, 2) we use the vector constructed by adding predefined displacement vectors according to the code information of the point. Both methods show a fractal-like character as well as an ordinary continuous deformation character. Also, 3) we can deform fern-fractal more naturally by restricting its deforming region using code form.

• Proceedings of the IEEK Conference
• /
• 1999.11a
• /
• pp.13-16
• /
• 1999

Many of the currently used PN code acquisition algorithms detect the phase of the incoming PN signal on the basis of ML estimation principle and utilize statistics grounded in taking inner products. As an extension of PN code acquisition algorithm using one auxiliary code introduced by Salih in 1996, we propose a more and optimal (hardware / time / space complexity wise) algorithm by using a vector space approach. We outline some important differences between our algorithm and that introduced by Salih and in the process point out some advantages of our algorithm.

• Computers and Concrete
• /
• v.2 no.5
• /
• pp.345-366
• /
• 2005

This work presents an assessment of the computational performance of a vector-parallel implementation of probabilistic model for concrete cracking in 3D. This paper shows the continuing efforts towards code optimization as reported in earlier works Paz, et al. (2002a,b and 2003). The probabilistic crack approach is based on the direct Monte Carlo method. Cracking is accounted by means of 3D interface elements. This approach considers that all nonlinearities are restricted to interface elements modeling cracks. The heterogeneity governs the overall cracking behavior and related size effects on concrete fracture. Computational kernels in the implementation are the inexact Newton iterative driver to solve the non-linear problem and a preconditioned conjugate gradient (PCG) driver to solve linearized equations, using an element by element (EBE) strategy to compute matrix-vector products. In particular the paper analyzes code behavior using OpenMP directives in parallel vector processors (PVP), such as the CRAY SV1 and CRAY T94. The impact of the memory architecture on code performance, and also some strategies devised to circumvent this issue are addressed by numerical experiment.

• Journal of IKEEE
• /
• v.18 no.3
• /
• pp.305-312
• /
• 2014

IIt takes a lot of time and needs the workloads to verify the RTL code used in complex system like a nuclear control system which is required high level reliability using simple testbench. UVM has a layered testbench architecture and it is easy to modify the testbench to improve the code coverage. A test vector can be easily constructed in the UVM, since a constrained random test vector can be used even though the construction of testbench using UVM. We showed that the UVM testbench is easier than the verilog testbench for the analysis and improvement of code coverage.

• Journal of Information Processing Systems
• /
• v.16 no.6
• /
• pp.1359-1371
• /
• 2020

In transmitting and receiving such a large amount of data, reliable data communication is crucial for normal operation of a device and to prevent abnormal operations caused by errors. Therefore, in this paper, it is assumed that an error correction code (ECC) that can detect and correct errors by itself is used in an environment where massive data is sequentially received. Because an embedded system has limited resources, such as a low-performance processor or a small memory, it requires efficient operation of applications. In this paper, we propose using an accelerated ECC-decoding technique with a graphics processing unit (GPU) built into the embedded system when receiving a large amount of data. In the matrix-vector multiplication that forms the Hamming code used as a function of the ECC operation, the matrix is expressed in compressed sparse row (CSR) format, and a sparse matrix-vector product is used. The multiplication operation is performed in the kernel of the GPU, and we also accelerate the Hamming code computation so that the ECC operation can be performed in parallel. The proposed technique is implemented with CUDA on a GPU-embedded target board, NVIDIA Jetson TX2, and compared with execution time of the CPU.

• The Transactions of the Korea Information Processing Society
• /
• v.5 no.5
• /
• pp.1172-1184
• /
• 1998

ILP(Instruction Level Parallelism) processors use code reordering algorithms to expose parallelism in a given sequential program. When applied to a loop, this algorithm produces a software-pipelined loop. In a software-pipelined loop, each iteration contains a sequence of parallel instructions that are composed of data-independent instructions collected across from several iterations. For vector loops, however the software pipelining technique can not expose the maximum parallelism because it schedules the program based only on data-dependencies. This paper proposes to schedule differently for vector loops. We develop an algorithm to detect vector loops at object code level and suggest a new vector scheduling algorithm for them. Our vector scheduling improves the performance because it can schedule not only based on data-dependencies but on loop structure or iteration conditions at the object code level. We compare the resulting schedules with those by software-pipelining techniques in the aspect of performance.

• Proceedings of the IEEK Conference
• /
• 2003.07e
• /
• pp.2287-2290
• /
• 2003

In this paper, an image vector quantization method is proposed not only to improve the compression ratio but also to reduce the computation cost. The proposed method could save the computation cost of codebook generation and encoding by using the modified LBG algorithm of Partial Search Partial Distortion (PSPD) in wavelet domain, by which the code book was constructed together with the partial codebook search, the partial code vector elements, and the interruption criterion. We have designed and implemented the vector quantizer to verify the improvement in reducing compression ratio in encoding processing and reducing the computation cost.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.18 no.9
• /
• pp.1348-1357
• /
• 1993

In this paper, we present code-excited linear prediction coding using trellis coded vector excitation, termed trellis code-excited linear prediction coding (TCELP), for an efficient 8 kbps digital cellular vocoder. A training sequence-based algorithm is developed for designing an optimized codebook subject to the TCELP structure. Also, we discuss the encoding complexity of the TCELP system and trellis symbol release rules that avoid excessive encoding delay. finally, simulation results results for the TCELP coder are given at the bit rate of 8 kbps.

• The Journal of Korean Institute of Communications and Information Sciences
• /
• v.29 no.12A
• /
• pp.1333-1339
• /
• 2004

In IS-95 and IMT-2000 systems using variable code rates and constraint lengths, this paper limits code rate 1/2 and constraint length 3 and states the effective reduction of PM(Path Metric) and BM(Branch Metric) memories and arithmetic comparative calculations with appling PVSL(Prototype Vector Selecting Logic) and LVQ(Learning Vector Quantization) in neural network to simplify systems and to decode forwardly. Regardless of extension of constraint length, this paper presents the new Vierbi decoder and the appied algorithm because new structure and algorithm can apply to the existing Viterbi decoder using only uncomplicated application and verifies the rationality of the proposed Viterbi decoder through VHDL simulation and compares the performance between the proposed Viterbi decoder and the existing.

• The Journal of the Acoustical Society of Korea
• /
• v.17 no.3E
• /
• pp.53-57
• /
• 1998

Spectral information at a speech coder should be quantized with sufficient accuracy to keep perceptually transparent output speech. Spectral information at a low bit rate speech coder is usually transformed into corresponding line spectrum pair parameters and is often quantized with a vector quantization algorithm. As the vector quantization algorithm generally has high complexity in the optimal code vector searching routine, the complexity reduction in that routine is investigated using the ordering property of the line spectrum pair. When the proposed complexity reduction algorithm is applied to the well-known split vector quantization algorithm, the 46% complexity reduction is achieved in the distortion measure compu-tation.