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Forward Viterbi Decoder applied LVQ Network  

Park Ji woong (광운대학교 제어계측공학과 서보제어 연구실)
Publication Information
The Journal of Korean Institute of Communications and Information Sciences / v.29, no.12A, 2004 , pp. 1333-1339 More about this Journal
Abstract
In IS-95 and IMT-2000 systems using variable code rates and constraint lengths, this paper limits code rate 1/2 and constraint length 3 and states the effective reduction of PM(Path Metric) and BM(Branch Metric) memories and arithmetic comparative calculations with appling PVSL(Prototype Vector Selecting Logic) and LVQ(Learning Vector Quantization) in neural network to simplify systems and to decode forwardly. Regardless of extension of constraint length, this paper presents the new Vierbi decoder and the appied algorithm because new structure and algorithm can apply to the existing Viterbi decoder using only uncomplicated application and verifies the rationality of the proposed Viterbi decoder through VHDL simulation and compares the performance between the proposed Viterbi decoder and the existing.
Keywords
LVQ(Learning Vector Quantization); PVSL(Prototype Vector Selecting Logic); 4-bit soft-decision;
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