• KSII Transactions on Internet and Information Systems (TIIS)
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• 제17권4호
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• pp.1296-1309
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• 2023

In this paper, based on the soft cancellation (SCAN) bit-flipping (SCAN-BF) algorithm, a generalized SCAN bit-flipping (GSCAN-BF-Ω) decoding algorithm is carried out, where Ω represents the number of bits flipped or corrected at the same time. GSCAN-BF-Ω algorithm corrects the prior information of the code bits and flips the prior information of the unreliable information bits simultaneously to improve the block error rate (BLER) performance. Then, a joint threshold scheme for the GSCAN-BF-2 decoding algorithm is proposed to reduce the average decoding complexity by considering both the bit channel quality and the reliability of the coded bits. Simulation results show that the GSCAN-BF-Ω decoding algorithm reduces the average decoding latency while getting performance gains compared to the common multiple SCAN bit-flipping decoding algorithm. And the GSCAN-BF-2 decoding algorithm with the joint threshold reduces the average decoding latency further by approximately 50% with only a slight performance loss compared to the GSCAN-BF-2 decoding algorithm.

• Structural Monitoring and Maintenance
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• 제10권1호
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• pp.63-86
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• 2023

Structural health monitoring and damage detection are essential for assessing, maintaining, and rehabilitating structures. Most of the existing damage detection approaches compare the current state structural response with the undamaged vibrational structural response, which is unsuitable for old and existing structures where undamaged vibrational responses are absent. One of the approaches for existing structures, numerical model updating/inverse modelling, available in the literature, is limited to numerical studies with high-end software. In this study, an attempt is made to study the effectiveness of the model updating technique, simplify modelling complexity, and economize its usability. The optimization-based detection problem is addressed by using programmable open-sourced code, OpenSees^® and a derivative-free optimization code, NOMAD^®. Modal analysis is used for damage identification of beam-like structures with several damage scenarios. The performance of the proposed methodology is validated both numerically and experimentally. The proposed method performs satisfactorily in identifying both locations and intensity of damage in structures.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2000년도 추계종합학술대회 논문집(1)
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• pp.157-160
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• 2000

In order to design a low complexity and high performance SOVA decoder for Turbo Codes, we need to analyze the decoding performance with respect to several important design parameters and find out optimal values for them. Thus, we use a scaling factor of soft output and a update depth as the parameters and analyze their effect on the BER performance of the SOVA decoder. finally, we shows the optimal values of them for maximum decoding performance of SOVA decoder for 3GPP complied Turbo codes.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2008년도 하계종합학술대회
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• pp.281-282
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• 2008

Turbo equalizers which use MAP (maximum a posteriori probability) equalizer or MMSE (minimum mean square error) equalizer have shown high performance and adoptability [1], [2]. In this paper, we show that the BP (belief propagation) algorithm can also be applied in equalizer and when it is connected with channel code, it can replace the MAP equalizer with similar complexity and performance.

• Electronics and Telecommunications Trends
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• 제9권4호
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• pp.9-21
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• 1994

Wide variety of the architectural complexity of parallel computer often makes it difficult to develop efficient programs for them. One of approaches to improve this difficulty is to program in familiar sequential languages such as Fortran or C and to parallelize sequential programs into equivalent parallel programs automatically. This paper presents an organization of parallelizing compiler which transforms sequential programs into equivalent parallel programs. The parallelizer consists mainly of syntax analysis, control and data flow analysis, program transformation, and parallel code generation. In particular, the program restructuring in this parallelizer maximizes loop parallelism.

• The Journal of the Acoustical Society of Korea
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• 제15권1E호
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• pp.34-38
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• 1996

In this paper, a new fast voronoi divider for vector quantization (VQ) is introduced, which results from Theorem that the nearest vectors in the sense of minimum mean square error(MMSE) have almost the same mean values of their elements. An improved splitting method for a VQ codebook design using the fast voronoi divider is also presented. Experimental results show that the new method reduces the complexity of training a VQ codebook several times with a high signal to noise ratio(SNR) using an appropriate extensive parameter of codebook.

• Proceedings of the IEEK Conference
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• 대한전자공학회 2006년도 하계종합학술대회
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• pp.965-966
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• 2006

As billion transistors system-on-chip (SoC) design becomes a reality, the productivity gap between rapidly increasing design complexity and designer productivity lagging behind is becoming a more serious problem to be solved. To reduce the gap, we present a system that generates executable transaction level models automatically. It speed up the SoC design space exploration process at various abstraction levels.

• Structural Engineering and Mechanics
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• 제49권5호
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• pp.631-644
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• 2014

Seismic assessment and retrofitting of existing structure is a complicated work that typically requires more sophisticated analyses than performing a new design. Before the implementation of a Code for seismic design of buildings (GBJ 11-89), not enough attention has been paid on seismic performance of structures and a great part of the existing reinforced concrete structures built in China have been poorly designed according to the new version of the same code (GB 50011-2010). This paper presents a case study of seismic assessment of a non-seismically designed reinforced concrete building in China. The structural responses are evaluated using the nonlinear static procedure (the so-called pushover analysis), which requires its introduction within a process that allows the estimation of the demand, against which the capacity is then compared with. The capacity of all structural members can be determined following the design code. Based on the structural performance, suitable retrofitting strategies are selected and implemented to the existing system. The retrofitted structure is analyzed again to check the effectiveness of the rehabilitation. Different types of retrofitting strategy are discussed and classified according to their complexity and benefits. Finally, a proper intervention methodology is utilized to upgrade this typical low-rise non-ductile building.

• ETRI Journal
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• 제25권6호
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• pp.464-474
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• 2003

Component-based development leverages software reusability and reduces development costs. Enterprise JavaBeans (EJB) is a component model developed to reduce the complexity of software development and to facilitate reuse of components. However, EJB does not support component assembly by a plug-and-play technique due to the hard-wired composition at the code level. To cope with this problem, an architecture for EJB component assembly is defined at the abstract level and the inconsistency between the system architecture and its implementation must be eliminated at the implementation level. We propose a component-based application development tool named the COBALT assembler that supports the design and implementation of EJB component assembly by a plug-and-play technique based on the architecture style. The system architecture is first defined by the Architecture Description Language (ADL). The wrapper code and glue code are then generated for the assembly. After the consistency between the architecture and its implementation is checked, the assembled EJB components are deployed in an application server as a new composite component. We use the COBALT assembler for a shopping mall system and demonstrate that it can promote component reuse and leverage the system maintainability.

• Journal of the Korean Institute of Telematics and Electronics S
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• 제35S권11호
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• pp.28-36
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• 1998

In the CDMA mobile communication system with asynchronous mode among base stations, the initial PN code acquisition method using a matched filter can be considered for the rapid PN code synchronization acquisition in the handoff region. In the model of the noncoherent QPSK/DS-SS under the Rayleigh fading channel, the mean acquisttion time of the matched filter is analyzed to have a shortened time in proportion to the length of matched filter to be compared with the serial correlation method. In this paper to improve the HW complexity of the conventional matched device which enables the repeated correlation process, is designed and its function is verified through the FPGAsimulation using Altera MaxPlus Ⅱ.