• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.5 s.335
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• pp.31-38
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• 2005

The architecture and the implementation details of a UTMI(USB2.0 Transceiver Macrocell Interface) compatible USB2.0 transceiver chip were presented. To confirm the validation of the incoming data in noisy channel environment, a squelch state detector and a current mode Schmitt-trigger circuit were proposed. A current mode output driver to transmit 480Mbps data on the USB cable was designed and an on-die termination(ODT) which is controlled by a replica bias circuit was presented. In the USB system using plesiochronous clocking, to compensate for the frequency difference between a transmitter and a receiver, a synchronizer using clock data recovery circuit and FIFO was designed. The USB cable was modeled as the lossy transmission line model(W model) for circuit simulation by using a network analyzer measurements. The USB2.0 PHY chip was implemented by using 0.25um CMOS process and test results were presented. The core area excluding the IO pads was $0.91{\times}1.82mm^2$. The power consumptions at the supply voltage of 2.5V were 245mW and 150mW for high-speed and full-speed operations, respectively.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.2
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• pp.54-61
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• 1999

This paper describes the design of a 4-Mbps wireless infrared data transceiver chip. The receiver consits of the analog front-end, clock recovery and frame generator, and demodulator. The transmitter consists of the demodulator and LED driver. The versatile analog front- end consisting of multiple amplifiers makes it possible for the chip to be applied to various infrared environments by compensating DC and offset signal components. A 4PPM (pulse position modulation) scheme is used for data transfer in order to meet the IrDA standards. The chip was fabricated in a $0.8-{\mu}m$ 2-poly, 2-metal CMOS technology and dissipates 122mW for ${\pm}2.5V$ supply.

• JSTS:Journal of Semiconductor Technology and Science
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• v.14 no.6
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• pp.777-788
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• 2014

This paper presents a wide output range, high power efficiency reconfigurable charge pump for driving touch panels with the high resistances. The charge pump is composed of 4-stages and its configuration automatically changes based on the required output voltage level. In order to keep the power efficiency over the wide output voltage range, internal blocks are automatically activated or deactivated by the clock driver in the reconfigurable charge pump minimizing the switching power loss due to the On and Off operations of MOSFET. In addition, the leakage current paths in each mode are blocked to compensate for the variation of power efficiency with respect to the wide output voltage range. This chip is fabricated using $0.18{\mu}m$ BCD process with high power MOSFET options, and the die area is $1870{\mu}m{\times}1430{\mu}m$. The power consumption of the charge pump itself is 79.13 mW when the output power is 415.45 mW at the high voltage mode, while it is 20.097 mW when the output power is 89.903 mW at the low voltage mode. The measured maximum power efficiency is 84.01 %, when the output voltage is from 7.43 V to 12.23 V.

• Korean Journal of Applied Biomechanics
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• v.17 no.2
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• pp.31-40
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• 2007

Proper weight shifting is essential for a successful shot in golf swing and this could be described by means of the ground forces between the feet and ground. It is assumed that the ground forces would different according to the club used because the length and swing weight of each club is different. But, in present, it is not clear what changes are made by the change of clubs and this affect the swing motion. Therefore this study focused on the investigation of the changes of the ground forces and ground reaction forces (GRF) by the change of club length. The subjects were three professional male golfers. Four swings (driver, iron 3, iron 5, and iron 7) for each subject were taken by two high speed video cameras and two AMTI force platforms were used to measure the GRF simultaneously. Kwon GRF 2.0 and Mathcad 13 software were used to post processing the data. Changes of the three major component of GRF (Vertical, lateral, anterior-posterior force) at 10 predefined events were analyzed including the maximum. Major findings of this study were as follows. 1. Vertical forces; - There were no significant changes until the top of backswing. - Maximum was occurred at the club horizontal position in the downswing for both feet. The shorter club produced more maximum forces than longer ones in the left foot, but reverse were true for the right foot. - Maximum forces at impact shows the same patterns. 2. Lateral forces; Maximum was occurred at the club horizontal position for both feet, but there were no lateral forces because the direction of two forces was different. Maximum force pattern by different clubs was same as the vertical component. 3. Anterior-posterior forces; - This component made a counter-clock wise moment about a vertical axis located between two foot until the club vertical position was reached during the backswing, and reverse moment were produced when the club reached horizontal at the downswing. - Also this component made a forward moment about a horizontal axis located in the CG during the fore half of the downswing, and a reverse moment until the club reached vertical at the follow through phase. Maximum was occurred at the club vertical in the downswing for both feet. The longer club produced more maximum forces than shorter ones for both feet.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.5
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• pp.87-97
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• 2016

This work proposes a time-shared 10b DAC based on a two-step resistor string to minimize the effective area of a DAC channel for driving each AMOLED display column. The proposed DAC shows a lower effective DAC area per unit column driver and a faster conversion speed than the conventional DACs by employing a time-shared DEMUX and a ROM-based two-step decoder of 6b and 4b in the first and second resistor string. In the second-stage 4b floating resistor string, a simple current source rather than a unity-gain buffer decreases the loading effect and chip area of a DAC channel and eliminates offset mismatch between channels caused by buffer amplifiers. The proposed 1-to-24 DEMUX enables a single DAC channel to drive 24 columns sequentially with a single-phase clock and a 5b binary counter. A 0.9pF sampling capacitor and a small-sized source follower in the input stage of each column-driving buffer amplifier decrease the effect due to channel charge injection and improve the output settling accuracy of the buffer amplifier while using the top-plate sampling scheme in the proposed DAC. The proposed DAC in a $0.18{\mu}m$ CMOS shows a signal settling time of 62.5ns during code transitions from '$000_{16}$' to '$3FF_{16}$'. The prototype DAC occupies a unit channel area of $0.058mm^2$ and an effective unit channel area of $0.002mm^2$ while consuming 6.08mW with analog and digital power supplies of 3.3V and 1.8V, respectively.