• Title/Summary/Keyword: class-D amplifier

Search Result 140, Processing Time 0.024 seconds

A Two-Stage Power Amplifier with a Latch-Structured Pre-Amplifier (래치구조의 드라이브 증폭단을 이용한 2단 전력 증폭기)

  • Choi Young-Shig;Choi Heyk-Hwan
    • Journal of the Korea Institute of Information and Communication Engineering
    • /
    • v.9 no.2
    • /
    • pp.295-300
    • /
    • 2005
  • In this paper we have designed a two-stage Class I power amplifier operated at 2.4CHz for Class-1 Bluetooth application. The power amplifier employs class-I topology to exploit its soft-switching property for high efficiency. The latch-structured pre-amplifier with amplifiers makes its output signal as sharp as possible for soft switching of the next power amplifier. It improves the overall efficiency of the proposed power amplifier. It shows 65.8$\%$ PAE, 20dB power gain and 20dBm output power.

Electrical Noise Reduction in the Electromagnetic Shaker System using a Class-D Amplifier (Class-D 증폭기를 사용한 가진기 시스템의 전기적 잡음 감소)

  • 윤을재;김인식;한태균
    • Journal of the Korean Society of Propulsion Engineers
    • /
    • v.3 no.4
    • /
    • pp.12-22
    • /
    • 1999
  • Operation of an electromagnetic shaker system using a Class-D amplifier may cause unacceptable electromagnetic interference to another electronic system, requiring the user to take whatever steps are necessary to correct the interference. A differential amplifier in a Class-D amplifier is used to decrease the effect of a common-mode noise voltage in a shaker system. To prevent a ground loop, a transformer is inserted in another shaker system. These methods show reduction of the unwanted vibration which has occurred before. A transformer in a charge amplifier was used to prevent a ground loop in a shaker system using a Class-AB amplifier a few years ago, but it was susceptible of noise in a shaker system using a Class-D amplifier. Hence we corrected a ground loop between a charge amplifier and a vibration control/analysis system without a transformer. The usefulness of this approach is illustrated by the results of experiments.

  • PDF

Implementation of Ceramic Flat speaker with a D Class Audio Amplifier (D 클래스 오디오 앰프의 세라믹 평판스피커 구현)

  • Yang, Won-Woo;Lee, Sun-Bok;Song, Young-Jun;Lee, Je-Hoon;Hong, You-Sik;Ahn, Jae-Hyeong
    • Journal of the Institute of Electronics Engineers of Korea CI
    • /
    • v.48 no.6
    • /
    • pp.56-61
    • /
    • 2011
  • A class-D audio amplifier is widely used in coil speaker. This paper presented the technique for applying a class-D audio amplifier to the ceramic flat speaker. This technique can be achieved by employing a matching transmitter in order to replace class-G amplifier that is drven by voltage level to class-D amplifier employing power driving method. Consequently, the presented technique can improve the efficiency by making the voltage driving level a litter larger. We evaluate the sound-level efficiency using the various mediums such as wood, plastic, and paper. From the simulation results, the proposed technique employing a class-D audio amplifier rather than a class-G one showed a 10% improvement. The proposed system can be applicable for the mobile appliances as an external slim speaker.

Current Controlled Class-D Stereo Amplifier Using Three-Phase Full Bridge (3상 풀 브리지를 이용한 전류제어형 D급 스테레오 앰프)

  • 송권일;윤인국;오덕진;김희준
    • Proceedings of the IEEK Conference
    • /
    • 2000.06e
    • /
    • pp.13-16
    • /
    • 2000
  • This paper presents a simple class-D stereo amplifier using 3-phase full bridge circuit configurations which is controlled by a new current control switching method. Although this class-D amplifier has an only one current control loop with the proposed switching method, a good performance can be obtained. In this paper, a strategy for driving stereo signal amplifier with 3-phase full bridge is discussed. With the experimental results, usefulness of the proposed amplifier is confirmed.

  • PDF

A Class-D Amplifier for a Digital Hearing Aid with 0.015% Total Harmonic Distortion Plus Noise

  • Lee, Dongjun;Noh, Jinho;Lee, Jisoo;Choi, Yongjae;Yoo, Changsik
    • ETRI Journal
    • /
    • v.35 no.5
    • /
    • pp.819-826
    • /
    • 2013
  • A class-D audio amplifier for a digital hearing aid is described. The class-D amplifier operates with a pulse-code modulated (PCM) digital input and consists of an interpolation filter, a digital sigma-delta modulator (SDM), and an analog SDM, along with an H-bridge power switch. The noise of the power switch is suppressed by feeding it back to the input of the analog SDM. The interpolation filter removes the unwanted image tones of the PCM input, improving the linearity and power efficiency. The class-D amplifier is implemented in a 0.13-${\mu}m$ CMOS process. The maximum output power delivered to the receiver (speaker) is 1.19 mW. The measured total harmonic distortion plus noise is 0.015%, and the dynamic range is 86.0 dB. The class-D amplifier consumes 304 ${\mu}W$ from a 1.2-V power supply.

Design of J-Class Amplifier with High Efficiency (고효율특성을 갖는 J급 증폭기 설계)

  • Roh, Hee-Jung;Lee, Byung Sun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
    • /
    • v.26 no.11
    • /
    • pp.48-53
    • /
    • 2012
  • In this paper designed J-class amplifier that have high efficiency using parasitic of pHEMT. Measured results of the designed J-class amplifier is maxmum output power of 31.5dBm and gain of 16.5dB, minimum output power of 29.8dBm. when input power 15dBm. Maxmum drain efficiency is 76.2% at 2.95GHz, maxmum drain efficiency is 61%. The J-class amplifier has average gain of 15.35dB and average efficiency of 35%.

A 1.5V 70dB 100MHz CMOS Class-AB Complementary Operational Amplifier (1.5V 70dB 100MHz CMOS Class-AB 상보형 연산증폭기의 설계)

  • 박광민
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
    • /
    • v.15 no.9
    • /
    • pp.743-749
    • /
    • 2002
  • A 1.5V 70㏈ 100MHz CMOS class-AB complementary operational amplifier is presented. For obtaining the high gain and the high unity gain frequency, the input stage of the amplifier is designed with rail-to-rail complementary differential pairs which are symmetrically parallel-connected with the NMOS and the PMOS differential input pairs, and the output stage is designed to the rail-to-rail class-AB output stage including the elementary shunt stage technique. With this design technique for output stage, the load dependence of the overall open loop gain is improved and the push-pull class-AB current control can be implemented in a simple way. The designed operational amplifier operates perfectly on the complementary mode with 180$^{\circ}$ phase conversion for 1.5V supply voltage, and shows the push-pull class-AB operation. In addition, the amplifier shows the DC open loop gain of 70.4 ㏈ and the unity gain frequency of 102 MHz for $C_{L=10㎊∥}$ $R_{L=1㏁}$ Parallel loads. When the resistive load $R_{L}$ is varied from 1 ㏁ to 1 ㏀, the DC open loop gain of the amplifier decreases by only 2.2 ㏈.a$, the DC open loop gain of the amplifier decreases by only 2.2 dB.

Design of a Dual Band High PAE Power Amplifier using Single FET and Class-F (Single FET와 Class-F급을 이용한 이중대역 고효율 전력증폭기 설계)

  • Kim, Seon-Sook;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
    • /
    • v.45 no.1
    • /
    • pp.110-114
    • /
    • 2008
  • In this paper, high efficient class F power amplifier with dual band has been realized. Dual band power amplifier have used modify stub matching for single FET, center frequency 2.14GHz and 5.2GHz respectively. Dual band amplifier is 32.65dBm output power, gain 11dB and PAE 36% at the 2.14GHz, 7dB gain at the 5.2GHz. Design of a dual band class F power amplifier using harmonic control circuit. The measured are 9.9dB gain, 30dBm output power and PAE 55% at the 2.14GHz, 11.7dB gain at the 5.2GHz. This paper is being used the load-pull method and it maximizes output power and it is using the only one transistor in the paper. As a result, this research will obtain a dual band high PAE power amplifier.

Design of High Efficiency Power Amplifier Using Adaptive Bias Technique and DGS (적응형 바이어스기법과 DGS를 이용한 고효율 전력증폭기설계)

  • Oh, Chung-Gyun;Son, Sung-Chan
    • 한국정보통신설비학회:학술대회논문집
    • /
    • 2008.08a
    • /
    • pp.403-408
    • /
    • 2008
  • In this paper, the high efficiency and linearity Doherty power amplifier using DGS and adaptive bias technique has been designed and realized for 2.3GHz WiBro applications. The Doherty amplifier has been implemented us-ing silicon MRF 281 LDMOS FET. The RF performances of the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with DGS and adaptive bias technique has been 36.6% at 34.01dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

  • PDF

A Design of High Efficiency Doherty Power Amplifier for Microwave Applications (마이크로파용 고효율 Doherty 전력증폭기 설계)

  • Oh Jeong-Kyun;Kim Dong-Ok
    • Journal of Navigation and Port Research
    • /
    • v.30 no.5 s.111
    • /
    • pp.351-356
    • /
    • 2006
  • In this paper, the high efficiency Doherty power amplifier has been designed and realized for microwave applications. The Doherty amplifier has been implemented using silicon MRF 281 LDMOS FET. The RF performances cf the Doherty power amplifier (a combination of a class AB carrier amplifier and a bias-tuned class C peaking amplifier) have been compared with those of a class AB amplifier alone. The realized Doherty power amplifier P1dB output power has 33dBm at 2.3GHz frequency. Also the Doherty power amplifier shows 11dB gain and -17.8dB input return loss at 2.3GHz to 2.4GHz. The designed Doherty amplifier has been improved the average PAE by 10% higher efficiency than a class AB amplifier alone. The Maximum PAE of designed Doherty power amplifier has been 39%.