• Journal of the Institute of Electronics Engineers of Korea TC
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• v.46 no.1
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• pp.102-106
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• 2009

This paper presents the design and optimization of output matching network according to envelope for class F power amplifier(PA) which is to apply to envelope elimination and restoration(EER) transmitter. In this paper, to increase the PAE of class F power amplifier which applies to EER transmitter, the varactor diode has been used on output matching network. As envelope changes, it optimizes constitution of harmonic trap that is short circuit in 2nd-harmonic and is open circuit in 3rd-harmonic. When drain voltage changes from 25 V to 30 V, some percentage is improved in the PAE.put the abstract of paper here.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.8
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• pp.873-879
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• 2007

We have implemented a highly efficient 2.14-GHz class-F amplifier using Freescale 4-W peak envelope power(PEP) RF Si lateral diffusion metal-oxide-semiconductor field effect transistor(LDMOSFET). Because the control of the all harmonic contents is very difficult, we have managed only the $2^{nd}\;and\;3^{rd}$ harmonics to obtain the high efficiency with simple harmonic control circuit. In order to design the harmonic control circuit accurately, we extracted the bonding wire inductance and drain-source capacitance which are dominant parasitic and package effect components of the device. And then, we have fabricated the class-F amplifier. The measured drain and power-added efficiency are 65.1 % and 60,3 %, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.2
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• pp.80-85
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• 2010

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using metamaterial structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. CRLH structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 5.93 %, 12.83 dB compared with those of conventional Class-F amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.12
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• pp.1060-1068
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• 2011

In this paper, Current-Mode Class-D(CMCD) RF Power Amplifier(PA) is designed and implemented at 900 MHz. Conventional CMCD PA has output parallel resonator to reconstruct a fundamental frequency component of the output signal. However the resonator can be removed by connecting inverse class-F PAs because even-harmonic components can be removed by CMCD PA's push-pull structure. Using load-pull, inverse class-F PA with GaN transistors is designed, and CMCD PA with the inverse class-F PA is implemented. The CMCD PA has 64.5 % drain efficiency, 34.2 dBm output power. Comparing with the drain efficiency of a CMCD PA with parallel resonator, the CMCD with the inverse class-F technology has 13.6 % improved drain efficiency.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.1065-1071
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• 2010

In this paper, we proposed a novel harmonic load circuit to design a high efficiency class-F amplifier. The proposed load circuit controls termination impedances to enhance the efficiency of class-F power amplifier. The termination impedances at the 2nd and the 3rd harmonics are showed short and open condition, respectively. Also, a fabricated load circuit showed an attenuation characteristic more than 29 dB, that is enough to eliminate harmonics of the class-F power amplifier. The measured drain and power-added efficiency are 75.7 % and 71.3 % at the point of maximum output power 35.17 dBm.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.4
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• pp.394-402
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• 2013

This paper presents design, fabrication and ruggedness test of switching-mode power amplifier using GaN(Gallium Nitride) HEMT(High Electron Mobility Transistor) for S-band radar applications. The power amplifier is designed to Class-F for high efficiency. The input signal for the measurement of the power amplifier is pulse signal at $100{\mu}s$ pulse width and duty cycle of 10 %. The measurement results of the fabricated Class-F power amplifier are a power gain of 10.8 dB, an output power of 40.8 dBm, a power added efficiency(PAE) of 54.2 %, and a drain efficiency of 62.6 %, at the center frequency. We proposed reliability test set-up of a power amplifier for ruggedness test. And we measured output power and efficiency according to VSWR(Voltage Standing Wave Ratio) variation. The designed power amplifier achieved output power of 32.6~41.1 dBm and drain efficiency of 23.4~63 % by changing VSWR, respectively.

• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.8 no.2
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• pp.75-82
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• 2009

This paper proposes a method which increases the linearity using an improvement mechanism of Doherty power amplifier and compensates the decrement of efficiency due to improvement of linearity. To verify the method, a 20W power amplifier is designed and implemented. Compared with 2-way Doherty power amplifier, the implemented 3-way Doherty power amplifier with class F shows improved linearity about 10dBc and efficiency about 1.5%. Also, efficiency characteristic has been improved about 3.5% compared with the 2-way Doherty power amplifier while maintaining linearity. This results show that the proposed 3-way Doherty power amplifier with class F is shown to be adequate for improvement of efficiency and linearity. It is expected that the proposed amplifier can be used for various wireless communication system amplifiers.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.2
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• pp.81-86
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• 2007

In this paper, the Power Added Efficiency (PAE) and linearity of class-F PA has been improved by using the PBG structure and the application of EER structure, simultaneously. The adaptive bias control circuit has been employed to improve the PAE through the application of EER structure. The PBG structure has been adapted for improving the Linearity by suppressing the harmonics on the output of amplifier. The PAE and the 3rd Inter-Modulation Distortion (IMD) has improved 34.56%, 10.66 dB, compared with those of the conventional Doherty amplifier, respectively.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.18 no.6 s.121
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• pp.584-590
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• 2007

In this paper, the efficiency of power amplifier has been maximized by the application of EER structure, and the linearity has been improved by using PBG structure. This paper has proposed a design of power amplifier in class-F to get the PAE, and to control dynamic power using envelope detector. PBG structure gets high-linearity by removing harmonics arisen from the mismatching of matching circuit. The PAE and the 3rd order IMD have been improved 34.64%, 6.65 dB compared with those of conventional Doherty amplifier, respectively.

• Proceedings of the Korea Electromagnetic Engineering Society Conference
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• 2003.11a
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• pp.113-117
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• 2003

This paper describes the design and the simulation results of the RF CMOS Class-E Power Amplifier for a 2.4GHz ISM band. This circuit is composed two connected amplifiers. where Class F amplifier drives Class E amplifier. The proposed circuit can reduce the total power dissipation of the driving stage and can work with higher efficiency. The power amplifier has been implemented in a standard $0.25{\mu}m$ CMOS technology and is shown to deliver 100mW output power to load with 41% power added efficiency(PAE) from a 2.5V supply.