• Transactions on Electrical and Electronic Materials
• /
• v.10 no.4
• /
• pp.125-130
• /
• 2009

The clamping voltage characteristics and accelerated aging behavior of CoCrTb-doped Zn/Pr-based varistors were investigated for different sintering temperatures. The best clamping voltage characteristics were obtained for the varistors sintered at $1330^{\circ}C$, with a clamping voltage ratio (K) of 1.63 at a surge current of 5 A and 1.75 at a surge current of 10 A. The varistors sintered at $1330^{\circ}C$ exhibited the highest stability, with -0.1% in $%{\Delta}E_{1\;mA}$, -0.2% in $%{\Delta}{\alpha}$, and +15.5% in $%{\Delta}J_L$ for E-J characteristics under a stress state of 0.90 $E_{1\;mA/120^{\circ}C$ /24 h. Furthermore, it exhibited $%{\Delta}{\varepsilon}_{APP}$' of -0.7% and $%{\Delta}tan{\delta}$ of +5.7% for dielectric characteristics under the same stress state.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.8
• /
• pp.835-839
• /
• 2004

The surge characteristics of ZnO varistors consisting of $ZnO-{Pr}_6{O}_11-CoO-{Cr}_2{O}_3-{Er}_2{O}_3$ceramics were investigated at various sintering temperatures. As sintering temperature raises, the varistor voltage was decreased from 341.2 to 223.1 V/mm, the nonlinear exponent was decreased from 64,9 to 44.1. On the other hand, the leakage current exhibited a minimum(0.64 $\mu$A) at 134$0^{\circ}C$, The clamping capability was slightly deteriorated with increasing sintering temperature. On the whole, the ZPCCE-based ZnO varistors exhibited good clamping voltage characteristics as exhibiting the clamping voltage ratio of 1.85 ∼ 1.92 approximately at surge current of 100 A.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.18 no.1
• /
• pp.50-56
• /
• 2005

The electrical properties, clamping voltage characteristics, and stability of dysprosia-doped ZnO-P $r_{6}$ $O_{11}$-based varistors were investigated with different dysprosia contents from 0 to 2.0 mol%. The incorporation of dysprosia in varistor ceramics greatly increased the varistor voltage from 50 to 481.0 V/mm. It was found that the dysprosia is good additive improving a nonlinearity, in which the nonlinear exponent is above or near 50, and the leakage current is below 1.0 $\mu$A. The dysprosia-doped varistors exhibited superior clamping voltage characetristics, in which clamping voltage ratio is above or neat 2 at surge current of 50 A. The 0.5 mol% dysprosia-doped varistors only exhibited high stability, with the rate of varistor voltage of -0.9%, under DC acceleraetd aging stress, 0.95 $V_{lmA}$/15$0^{\circ}C$/24 h.h.h.h.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
• /
• v.27 no.12
• /
• pp.101-108
• /
• 2013

This paper presents A Zero-Voltage-Switching(ZVS) Three-Level DC/DC Converter using Primary Clamping Diodes. The Previous ZVS Three-Level DC/DC converter realizes ZVS for the switches with the use of the leakage inductance(or external resonant inductance) and the output capacitors of the switches, however the rectifier diodes suffer from recovery which results in oscillation and voltage spike. In order to solve this problem, this paper proposes a novel ZVS Three-Level DC/DC converter, which introduces two clamping diodes to the basic Three-Level converter to eliminate the oscillation and clamp the rectified voltage to the reflected input voltage.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
• /
• v.5B no.4
• /
• pp.343-349
• /
• 2005

This paper proposes a novel zero-voltage-switching (ZVS) Push-pull DC-DC Converter for high input voltage and high power applications. This topology utilizes two switches in series to replace one switch in conventional push-pull converter, and two clamping diodes are introduced. The voltage stress of the switches is the input voltage, and the switches can realize ZVS with the use of the leakage inductance of the transformer. Furthermore, secondary full-wave rectifier with a clamping capacitor is used to eliminate the voltage oscillation and spike of the rectifier diodes due to the reverse recovery. Therefore, the electromagnetic interference is reduced effectively. The operation principle of the proposed converter is analyzed theoretically. The output characteristic, ZVS condition and design principle of the clamping capacitor are discussed. Experimental results obtained from a 270V input 2kW prototype with $95.8\%$ high efficiency confirms the design.

• Proceedings of the KIEE Conference
• /
• 1995.11a
• /
• pp.299-301
• /
• 1995

This paper represents an overvoltage clamping circuit for three level inverters. With a proposed overvoltage clamping circuit, the problems that high voltage stresses and voltage unbalance between outer and inner switches occurs in high power and high voltage 3-level inverters are reduced.

• Korean Journal of Materials Research
• /
• v.15 no.3
• /
• pp.143-148
• /
• 2005

The microstructure, electrical properties, and clamping voltage characteristics of $ZnO-Pr_6O_{11}-CoO-Cr_2O_3-Y_2O_3(ZPCCY)-based$ varistor ceramics sintered at $1350^{\circ}C$ were investigated as a function of sintering time from 1 to 3 h. With increasing sintering time, the average grain size and density increased in the range of $11.4\~16.0\;{\mu}m$ and $5.34\~5.54g/cm^3$, respectively, in accordance of increasing sintering time. The nonlinear exponent decreased in the range of $60\~26$ and the leakage current increased in the range of $1.3\~10.7\;{\mu}A$ with increasing sintering time. The clamping voltage ratio increased in the range $1.58\~1.65$ for ratio surge current of 10 A as the sintering time increased.

• Proceedings of the KIPE Conference
• /
• 2008.06a
• /
• pp.520-522
• /
• 2008

A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

• Proceedings of the KIEE Conference
• /
• 1994.07a
• /
• pp.258-261
• /
• 1994

This paper presents a circuit design far clamping the overvoltages across the GTOs in three-level GTO inverters. The proposed circuit has two roles as follows; one is to minimize the power dissipation in each GTO. It can be achieved by clamping the overvoltage to half that of the DC-link voltage as exactly as possible. The other is to get blocking voltage balancing between the inner GTOs and the outer GTOs.

• Proceedings of the KIEE Conference
• /
• 1987.07a
• /
• pp.791-793
• /
• 1987