• Title/Summary/Keyword: circuit power

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Design of a CMOS IF PLL Frequency Synthesizer (CMOS IF PLL 주파수합성기 설계)

  • 김유환;권덕기;문요섭;박종태;유종근
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.8
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    • pp.598-609
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    • 2003
  • This paper describes a CMOS IF PLL frequency synthesizer. The designed frequency synthesizer can be programmed to operate at various intermediate frequencies using different external LC-tanks. The VCO with automatic amplitude control provides constant output power independent of the Q-factor of the external LC-tank. The designed frequency divider includes an 8/9 or 16/17 dual-modulus prescaler and can be programmed to operate at different frequencies by external serial data for various applications. The designed circuit is fabricated using a 0.35${\mu}{\textrm}{m}$ n-well CMOS process. Measurement results show that the phase noise is 114dBc/Hz@100kHz and the lock time is less than 300$mutextrm{s}$. It consumes 16mW from 3V supply. The die area is 730${\mu}{\textrm}{m}$$\times$950${\mu}{\textrm}{m}$.

Integrated Circuit Implementation and Characteristic Analysis of a CMOS Chaotic Neuron for Chaotic Neural Networks (카오스 신경망을 위한 CMOS 혼돈 뉴런의 집적회로 구현 및 특성 해석)

  • Song, Han-Jeong;Gwak, Gye-Dal
    • Journal of the Institute of Electronics Engineers of Korea CI
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    • v.37 no.5
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    • pp.45-53
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    • 2000
  • This paper presents an analysis of the dynamical behavor in the chaotic neuron fabricated using 0.8${\mu}{\textrm}{m}$ single poly CMOS technology. An approximated empirical equation models for the sigmoid output function and chaos generative block of the chaotic neuron are extracted from the measurement data. Then the dynamical responses of the chaotic neuron such as biurcation diagram, frequency responses, Lyapunov exponent, and average firing rate are calculated with numerical analysis. In addition, we construct the chaotic neural networks which are composed of two chaotic neurons with four synapses and obtain bifurcation diagram according to synaptic weight variation. And results of experiments in the single chaotic neuron and chaotic neural networks by two neurons with the $\pm$2.5V power supply and sampling clock frequency of 10KHz are shown and compared with the simulated results.

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A Study on the Realization of ADS-B 1090ES Ground Station Receivers (ADS-B 1090ES 지상국 수신기 구현에 관한 연구)

  • Park, Chan-Sub;Yoon, Jun-Chul;Cho, Ju-Yong;Shin, Hee-Sung;Seo, Jong-Deok;Park, Hyo-Dal;Kang, Suk-Youb
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.2
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    • pp.79-88
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    • 2015
  • This paper introduces surveillance equipment "ADS-B", the core subject of traffic control system and study of ADS-B 1090ES ground receiver. The standard is set not only for functional but also its reliability by analyzing international standard documents and existing products. The Bias circuit is designed for less power consumption, low noise and high gain for RF module. The signal processing is capable of overcoming its bad conditions. MCU part is configured with the latest CPU for high speed communication with external parts and SNMP is selected for remote control communication. The performance of developed receiver satisfies national and international standards and its functions are more advanced compared to foreign receivers.

Study on Structure and Principle of Linear Block Error Correction Code (선형 블록 오류정정코드의 구조와 원리에 대한 연구)

  • Moon, Hyun-Chan;Kal, Hong-Ju;Lee, Won-Young
    • The Journal of the Korea institute of electronic communication sciences
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    • v.13 no.4
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    • pp.721-728
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    • 2018
  • This paper introduces various linear block error correction code and compares performances of the correction circuits. As the risk of errors due to power noise has increased, ECC(: Error Correction Code) has been introduced to prevent the bit error. There are two representatives of ECC structures which are SEC-DED(: Single Error Correction Double Error Detection) and SEC-DED-DAEC(: Double Adjacent Error Correction). According to simulation results, the SEC-DED circuit has advantages of small area and short delay time compared to SEC-DED-DAEC circuits. In case of SED-DED-DAEC, there is no big difference between Dutta's and Pedro's from performance point of view. Therefore, Pedro's code is more efficient than Dutta' code since the correction rate of Pedro's code is higher than that of Dutta's code.

A Study on Protection of Generator Asynchronization by Impedance Relaying (임피던스 계전기를 이용한 발전기 비동기 투입 보호 연구)

  • Lee, Jong-Hweon
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.60 no.11
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    • pp.2000-2006
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    • 2011
  • Asynchronous phenomenon occurs on the synchronous generators under power system when a generator's amplitude of electromagnetic force, phase angle, frequency and waveform etc become different from those of other synchronous generators which can follow instantly varying speed of turbine. Because the amplitude of electromagnetic force, phase frequency and waveform differ from those of other generators with which are to be put into parallel operation due to the change of excitation condition for load sharing and the sharing load change, if reactive current in the internal circuit circulates among generators, the efficiency varies and the stator winding of generators are overheated by resistance loss. Where calculation method of protection settings and Logic for Protection of Generator Asynchronization will be recommended, A distance relay scheme is commonly used for backup protection. This scheme, called a step distance protection, is comprised of 3 steps for graded zones having different operating time. As for the conventional step distance protection scheme, Zone 2 can exceed the ordinary coverage excessively in case of a transformer protection relay especially. In this case, there can be overlapped protection area from a backup protection relay and, therefore, malfunctions can occur when any fault occurs in the overlapped protection area. Distance relays and overcurrent relays are used for backup protection generally, and both relays have normally this problem, the maloperation, caused by a fault in the overlapped protection area. Corresponding to an IEEE standard, this problem can be solved with the modification of the operating time. On the other hand, in Korea, zones are modified to cope with this problem in some specific conditions. These two methods may not be obvious to handle this problem correctly because these methods, modifying the common rules, can cause another coordination problem. To overcome asynchronizing protection this paper describes an improved backup protection coordination scheme using a new Logic that will be suggested.

Comparison of Starting Current Characteristics for Three-Phase Induction Motor Due to Phase-control Soft Starter and Asynchronous PWM AC Chopper

  • Thanyaphirak, Veera;Kinnares, Vijit;Kunakorn, Anantawat
    • Journal of Electrical Engineering and Technology
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    • v.12 no.3
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    • pp.1090-1100
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    • 2017
  • This paper presents the comparison of starting current characteristics of a three-phase induction motor fed by two types of soft starters. The first soft starter under investigation is a conventional AC voltage controller on the basis of a phase-control technique. The other is the proposed asynchronous PWM AC chopper which is developed from the conventional synchronous PWM AC chopper. In this paper, the proposed asynchronous PWM AC chopper control scheme is developed by generating only two asynchronous PWM signals for a three-phase main power circuit (6 switching devices) from a single voltage control signal which is compared with a single sawtooth carrier signal. By this approach, the PWM signals are independent and easy to implement since the PWM signals do not need to be synchronized with a three-phase voltage source. Details of both soft starters are discussed. The experimental and simulation results of the starting currents are shown. It is found that the asynchronous PWM AC chopper efficiently works as a suitable soft starter for the three-phase induction motor due to that the starting currents are reduced and are sinusoidal with less harmonic contents, when being compared with the starting current waveforms using the conventional phase-control starting technique. Also the proposed soft starter offers low starting electromagnetic torque pulsation.

A Novel Hybrid Converter with Wide Range of Soft-Switching and No Circulating Current for On-Board Chargers of Electric Vehicles

  • Tran, Van-Long;Tran, Dai-Duong;Doan, Van-Tuan;Kim, Ki-Young;Choi, Woojin
    • Journal of Electrical Engineering and Technology
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    • v.13 no.1
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    • pp.143-151
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    • 2018
  • In this paper, a novel hybrid configuration combining a phase-shift full-bridge (PSFB) and a half-bridge resonant LLC converter is proposed for the On-Board Charger of Electric Vehicles (EVs). In the proposed converter, the PSFB converter shares the lagging-leg switches with half-bridge resonant converter to achieve the wide ZVS range for the switches and to improve the efficiency. The output voltage is modulated by the effective-duty-cycle of the PSFB converter. The proposed converter employs an active reset circuit composed of an active switch and a diode for the transformer which makes it possible to achieve zero circulating current and the soft switching characteristic of the primary switches and rectifier diodes regardless of the load, thereby making the converter highly efficient and eliminating the reverse recovery problem of the diodes. In addition an optimal power sharing strategy is proposed to meet the specification of the charger and to optimize the efficiency of the converter. The operation principle the proposed converter and design considerations for high efficiency are presented. A 6.6 kW prototype converter is fabricated and tested to evaluate its performance at different conditions. The peak efficiency achieved with the proposed converter is 97.7%.

Discharging Voltage Control with Error Detecting for Search light of Ship (선박용 탐사조명 전원장치의 방전개시전압 제어와 조명 이상검출)

  • Park, Noh-Sik;Kwon, Soon-Jae;Lee, Dong-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.22 no.10
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    • pp.8-17
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    • 2008
  • This paper presents a stable lighting method for HID lamp for ship from initial discharging current limit with discharging voltage control. The output voltage of the proposed control scheme is boosted for ignition, and the charging voltage is decreased by the resistor discharging. The proposed controller fires the initial discharge at the designed discharging voltage to limit the discharge current. After the discharging, constant current controller is used for brightness in steady state. The proposed control scheme can limit the initial discharge current using the starting point control without a complex voltage controller. so it can improve the life-time of HID lamp and get a stable discharge from restricted the initial discharge current. In order to improve the protection of the system, a simple instantaneous error detecting circuit for open state and short state of HID lamp is used. The proposed error detecting of HID lamp can protect the power system of lamp control. The effectiveness of the proposed controller is verified from the experiments of practical 2.5[kW] HID search light for ship.

Design of a 5.2GHz/2.4GHz Dual band CMOS Frequency Synthesizer for WLAN (WLAN을 위한 5.2GHz/2.4GHz 이중대역 주차수 합성기의 설계)

  • Kim, Kwang-Il;Lee, Sang-Cheol;Yoon, Kwang-Sub;Kim, Seok-Jin
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.32 no.1A
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    • pp.134-141
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    • 2007
  • This paper presents a frequency synthesizer(FS) for 5.2GHz/2.4GHz dual band wireless applications which is designed in a standard $0.18{\mu}m$ CMOS1P6M process. The 2.4GHz frequency is obtained from the 5.2GHz output frequency of Voltage Controlled Oscillator (VCO) by using the Switched Capacitor (SC) and the divider-by-2. Power dissipations of the proposed FS and VCO are 25mW and 3.6mW, respectively. The tuning range of VCO is 700MHz and the locking time is $4{\mu}s$. The simulated phase noise of PLL is -101.36dBc/Hz at 200kHz offset frequency from 5.0GHz with SCA circuit on.

Effect of Process Variation of Al Grid and ZnO Transparent Electrode on the Performance of Cu(In,Ga)Se2 Solar Cells (Al 그리드와 ZnO 투명전도막 의 공정변화에 따른 Cu(In,Ga)Se2 박막태양전지의 특성 연구)

  • Cho, Bo Hwan;Kim, Seon Cheol;Mun, Sun Hong;Kim, Seung Tae;Ahn, Byung Tae
    • Current Photovoltaic Research
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    • v.3 no.1
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    • pp.32-38
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    • 2015
  • CIGS solar cell consisted of various films. In this research, we investigated electrode materials in $Cu(In,Ga)Se_2$ (CIGS) cells, including Al-doped ZnO (ZnO:Al), intrinsic ZnO (i-ZnO), and Al films. The sputtered ZnO:Al film with a sputtering power at 200W showed the lowest series resistance and highest cell efficiency. The electrical resistivity of the 200-W sputtered ZnO:Al film was $5.2{\times}10^{-4}{\Omega}{\cdot}cm$ by the rapid thermal annealing at $200^{\circ}C$ for 1 min. The electrical resistivity of i-ZnO was not measurable due to its high resistance. But the optical transmittance was highest with less oxygen supply and high efficiency cell was achieved with $O_2/(Ar+O_2)$ ratio was 1% due to the increase of short-circuit current. No significant change in the cell performance by inserting a Ni layer between Al and ZnO:Al films was observed.