• 한국정밀공학회:학술대회논문집
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• 한국정밀공학회 2005년도 추계학술대회 논문집
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• pp.804-807
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• 2005

In this paper, a double scotch yoke mechanism for moving simultaneously the fixed contact and moving contact of a gas circuit brake, is proposed and designed to improve the breaking characteristics of the circuit breaker. Firstly, the design parameters of the scotch yoke are kinematically determined from the desired design condition of the circuit breaker. Next, the stroke curve of the moving contact is designed by considering the design parameter and the specified opening characteristics of electric contacts. Based on the scotch yoke and stroke curve, the dynamics of the electric contacts is analyzed using ADAMS model of switch mechanism.

• 한국컴퓨터산업학회논문지
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• 제7권3호
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• pp.205-215
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• 2006

본 논문에서는 최근의 64비트 마이크로프로세서에 대해서 PLA설계법 및 검사가 쉽고 용이하도록 하는 방법에 대해서 논하였다. VLSI에서 RAM. ROM. PLA를 사용한 설계법이 정착 되어가고 있으며 PLA는 논리설계와 회로변경 및 검사가 용이하기 때문에 성능과 가격이 중요하다. 향후에도 PLA는 VLSI 설계의 기본요소로서 중요한 위치를 점유할 것이다.

• 대한전자공학회논문지
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• 제25권8호
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• pp.1010-1018
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• 1988

This paper proposes a MOS circuit extractor which extracts a netlist from the hierarchical mask information, for the verification tools. To utilize the regularity and the simple representation of the hierarchical circuit, and to reduce the debug cycle of design, verification, and modification, we propose a hierarvhical and incremental circuit extraction algorithm. In flat circuit extraction stage, the multiple storage quad tree is used as an internal data structure. Incremental circuit extraction using the hierarchical structure is made possible, to reduce the re-extraction time of the modified circuit.

• Journal of information and communication convergence engineering
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• 제6권1호
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• pp.43-46
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• 2008

This paper proposes an advanced test circuit for detecting the connectivity between a drum ring of laser printer and PCB. The detection circuit of charge sharing is proposed, which minimizes the influences of internal parasitic capacitances. The test circuit is composed of precharge circuit, analog comparator, level shifter. Its functional operation is verified using $0.6{\mu}m$ 3.3V/40V CMOS process parameter by HSPICE. Access time is100ns. Layout of the drum contact test circuit is $465{\mu}m\;{\times}\;117{\mu}m$.

• 한국항행학회논문지
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• 제12권3호
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• pp.255-262
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• 2008

본 논문은 JSP (Java Server Page) 웹 서버 기반 인터넷 웹 브라우저 용 회로부품정보 관리 시스템을 구축하였다. 설계자가 부품정보의 검색 및 신규 등록을 수행할 수 있도록 하였으며, 이를 EDA (Electronic Design Automation) 시스템과 직접 연동하여 회로 및 부품의 설계를 실 시간적으로 적용하도록 하는 웹 연동 회로부품 관리 시스템을 구현하였다. 그리하여 개별 설계자들이 작성 관리하던 EDA 시스템 부품 라이브러리를 웹 기반으로 관리 사용할 수 있도록 하여 회로설계 및 부품 개발에 효율성을 이루었다.

• JSTS:Journal of Semiconductor Technology and Science
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• 제14권4호
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• pp.443-450
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• 2014

This paper presents a 20-Gb/s optical receiver circuit fabricated with standard 65-nm CMOS technology. Our receiver circuits are designed with consideration for parasitic inductance and capacitance due to bonding wires connecting the photodetector and the circuit realized separately. Such parasitic inductance and capacitance usually disturb the high-speed performance but, with careful circuit design, we achieve optimized wide and flat response. The receiver circuit is composed of a transimpedance amplifier (TIA) with a DC-balancing buffer, a post amplifier (PA), and an output buffer. The TIA is designed in the shunt-feedback configuration with inductive peaking. The PA is composed of a 6-stage differential amplifier having interleaved active feedback. The receiver circuit is mounted on a FR4 PCB and wire-bonded to an equivalent circuit that emulates a photodetector. The measured transimpedance gain and 3-dB bandwidth of our optical receiver circuit is 84 $dB{\Omega}$ and 12 GHz, respectively. 20-Gb/s $2^{31}-1$ electrical pseudo-random bit sequence data are successfully received with the bit-error rate less than $10^{-12}$. The receiver circuit has chip area of $0.5mm{\times}0.44mm$ and it consumes excluding the output buffer 84 mW with 1.2-V supply voltage.

• 한국실내디자인학회논문집
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• 제17권3호
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• pp.59-67
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• 2008

This study aims to find out the characteristics and the type classification of contemporary public libraries in terms of browsing circuit. In so doing, it is to analyze 21 recently built libraries by using the browsing circuit, the spatial depth and the spatial layout. The study makes use of codes derived from the concept of 'Classification' and 'Frame' suggested by a pedagogist, Basil Bernstein. As a result, it shows that two codes are phased in overseas cases. In other words, one type is a lower depth of space and a high rate of rings with the multi-layer circuits and the three-dimensional circuit of multi-centered. the other type is the higher depth of space and a low rate of rings with the single-layer circuit and the multi-layer circuit of single-centered. In domestic cases, 4 types are shown. The characteristics of layout are seen as a radial shape and the rate of rings is lower than the overseas cases. It can be said that these results are a transitional phenomenon. For browsing circuit, domestic public libraries would be adapted to the three-dimensional circuit of multi-centered, a lower depth of space and a high rate of rings. By instructions of this plan, the real meaning of a public library will be come true.

• 한국조명전기설비학회:학술대회논문집
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• 한국조명전기설비학회 2005년도 춘계학술대회논문집
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• pp.106-110
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• 2005

In this paper, LED traffic signal lamp's operating circuit using Flyback converter and PFC IC has been presented. Most power conversion circuits use PFC IC for Power Factor Correction. The design parameter's value of Flyback converter has been proposed and the error amplifier which regulates the output voltage has been designed Besides, the under voltage protection circuit and the over voltage protection circuit for protecting the operating circuit kin unbalance of common electric power source and the temperature compensation circuit for fixed optical output power have been proposed.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2008년도 하계학술대회 논문집
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• pp.406-409
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• 2008

This paper presents the integrated magnetic circuit designing method for phase shift full bridge(PSFB) converter. The integrated magnetic circuit is implemented on redesigned of EI core. The transformer windings are located on center leg and the two inductors are located on the outer legs with air gap. Based on the equivalent circuit model, the principle of operation of the PSFB converter is explained. The operation and performance of the proposed circuit are verified on a 1.2 kW prototype converter. The analysis and design of the integrated magnetic circuit is verified through the experimental and simulation results.

• 대한전기학회논문지:시스템및제어부문D
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• 제53권10호
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• pp.727-732
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• 2004

TCXO is one of the most important component in communication systems. We present a analytic method approach to design the Temperature Compensated Circuit. The conventional method for extracting the circuit parameters, which are for thermistor, Colpitts and frequency control circuit is the trial and error correction. In this paper, we analyse the temperature compensating circuit to extract TCXO circuit parameter. In order to show the validity of this paper, we have designed and implemented the 10MHz TCXO. The fabricated TCXO shows 1ppm frequency drift characteristic over the temperature range of -40℃∼85℃.