• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.10
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• pp.19-26
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• 1997

Novel class AB CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well CMOS process for high-frequency current-mode signal processing were developed. The CCII for low power operation consists of a class AB push-pull stage for the current input, a complementary source follower for the voltage input, and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated CCII show that the current input impedance is 875.ohm. and the bandwidth of flat gain when used as a voltage amplifier extends beyond 4MHz. The power dissipation is 1.25mW and the active chip area is 0.2*0.15[mm$\^$2/].

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.11
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• pp.47-55
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• 1997

In general, processing flow of the conventional floating-point multiplication consists of either multiplication, addition, normalization, and rounding stage of the conventional floating-point multiplier requries a high speed adder for increment, increasing the overall execution time and occuping a large amount of chip area. A floating-point multiplier performing addition and IEEE rounding in parallel is designed by using the carry select addder used in the addition stage and optimizing the operational flow based on the charcteristics of floating point multiplication operation. A hardware model for the floating point multiplier is proposed and its operational model is algebraically analyzed in this paper. The proposed floating point multiplier does not require and additional execution time nor any high spped adder for rounding operation. Thus, performance improvement and cost-effective design can be achieved by this suggested approach.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.34C no.9
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• pp.1-9
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• 1997

Novel class A CMOS second-generation current conveyors (CCII) using 0.6.mu.m n-well standard CMOS process for high-frequency current-mode signal processing were developed. The CCII consists of a regulated current-cell for the voltage input and a cascode current mirror for the current output. In this architecture, the two input stages are coupled by current mirrors to reduce the current input impedance. Measurements of the fabricated cCII show that the current input impedance is 308 .ohm. and the 3-dB cutoff frequency when used as a voltage amplifier extends beyond 10MHz. The linear dynamic ranges of voltage and current are from -0.5V to 1.5V and from -100.mu.A to +120.mu.A for supply voltage V$\_$DD/ = -V$\_$SS/=2.5V, respectively. The power dissipation is 2 mW and the active chip area is 0.2 * 0.2 [mm$\^$2/].

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2003.04a
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• pp.416-421
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• 2003

To obtain the surface roughness with range from l0nm to In n need a ultra-Precision machine, cutting condition and the study of materials. And n have to also consider the chip and vibration of diamond tool during processing. In this paper, the cutting conditions for getting mirror surface of aluminum alloy have been examined experimentally by using ultra-precision turning and single crystal diamond tool. In generally, the cutting conditions have effect on the surface roughness in ultra-precision turning. The result of surface roughness was measured by the ZYGO New View 200.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.13 no.5
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• pp.118-123
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• 2004

The compressor has one of important roles in refrigeration cycle and it determines refrigeration efficiency and quality This paper aims to monitor rotary compressors for room air conditioners by using Acoustic Emission(AE) technique. The reliability of rotary compressors has been evaluated through visual inspection on them after long term test. This paper describes methods for acquisition and processing AE raw signal to monitor the state of rotary compressor. A detecting method of abnormal compressor in real time is suggested and special-purpose monitoring system which can be applied to automatic manufacturing line is developed using one-chip microprocessor at low cost.

• Transactions of the Korean Society of Machine Tool Engineers
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• v.17 no.1
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• pp.59-64
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• 2008

Micro machining can manufacture complex shapes with high accuracy. Especially, this enables wide application of micro technology in various fields. For example, micro channels allow fluid transfer, which is a widely used technology. Therefore, liquidity research of flow in micro channels and micro channel manufacturing with use of various materials and cutting conditions has very important meaning. In this study, to find out correlation between fluid velocity in micro channels and surface roughness, we manufactured micro channels using micro end-mill and dropped ethanol into micro channels. We compared several surface roughness and fluid velocity in micro channels that were created by various processing conditions. Finally, we found out relationship between fluid velocity and surface roughness in micro channels of different materials.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.2
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• pp.53-57
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• 2014

Thin glass (< 100 microns) is a promising material from which advanced interposers for high density electrical interconnects for 2.5D chip packaging can be produced. But thin glass is extremely brittle, so mechanical micromachining to create through glass vias (TGVs) is particularly challenging. In this article we show how laser processing using deep UV excimer lasers at a wavelength of 193 nm provides a viable solution capable of drilling dense patterns of TGVs with high hole counts. Based on mask illumination, this method supports parallel drilling of up over 1,000 through vias in 30 to $100{\mu}m$ thin glass sheets. (We also briefly discuss that ultrafast lasers are an excellent alternative for laser drilling of TGVs at lower pattern densities.) We present data showing that this process can deliver the requisite hole quality and can readily achieve future-proof TGV diameters as small $10{\mu}m$ together with a corresponding reduction in pitch size.

• Journal of Institute of Control, Robotics and Systems
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• v.21 no.10
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• pp.982-987
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• 2015

The inspection machine in SMT (Surface Mount Technology) line detects the assembly defects such as missing, misalignment, loosing, or tombstone. We propose a new method to classify the defect types of chip components by processing the image of PCB. Two original images are obtained from horizontal lighting and vertical lighting. The image of the component is divided into two soldering regions and one packaging region. The features are extracted by appling the PCA (Principle Component Analysis) to each region. The MLP (Multilayer Perceptron) and SVM (Support Vector Machine) are then used to classify the defect types by learning. The experimental results are presented to show the usefulness of the proposed method.

• Proceedings of the IEEK Conference
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• 1999.06a
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• pp.239-242
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• 1999

In this paper, we report the process/device design of high-speed, high-voltage SOI smart power IC for mobile communication system, high-speed HDD system and the electronic control system of automobiles. The high voltage LDMOS with 70V breakdown voltage under 0.8${\mu}{\textrm}{m}$ design rule, the high voltage bipolar with 40V breakdown voltage for analog signal processing, the high speed bipolar with cut-off frequency over 20㎓ and LDD NMOS for high density were proposed and simulated on a single chip by the simulator DIOS and DESSIS. And we extracted the process/device parameters of the simulated devices.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.67-70
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• 1999

DS-CDMA is used to widely spread spectrum for a cellular mobile digital communication that maximizing users- capacity at the limited frequency bandwidth, solving technical matters with the channel. Especially, the capability of a spread spectrum receiver relied on fast code acquisition time at the demodulation. In this paper, we considered that fast code acquisition time when a spread spectrum system is designed, and existed code acquisition system set up one code epoch on a position at initial processing, but the proposed code acquisition system improved that two code epoch are set up at the same time, therefore code acquisition time is diminished in effect. The structure modeling to VHDL language. Its synthesized the synthesized and, is implemented FPGA chip