A FPGA Design of Improved Acquisition System for DS-CDMA

DS-CDMA을 이용한 개선된 동기 획득 시스템의 FPGA 설계

DS-CDMA is used to widely spread spectrum for a cellular mobile digital communication that maximizing users- capacity at the limited frequency bandwidth, solving technical matters with the channel. Especially, the capability of a spread spectrum receiver relied on fast code acquisition time at the demodulation. In this paper, we considered that fast code acquisition time when a spread spectrum system is designed, and existed code acquisition system set up one code epoch on a position at initial processing, but the proposed code acquisition system improved that two code epoch are set up at the same time, therefore code acquisition time is diminished in effect. The structure modeling to VHDL language. Its synthesized the synthesized and, is implemented FPGA chip