• 제목/요약/키워드: chip platform

검색결과 168건 처리시간 0.026초

AMBA Platform을 기반으로 하는 SoC 상의 DMAC 설계 (Implementation of DMAC on SoC based on AMBA Platform)

  • 황인기;김정식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2004년도 학술대회 논문집 정보 및 제어부문
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    • pp.417-419
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    • 2004
  • Because of the demands for high performance and high integrated system, the needs for optimal platform becomes more importance. Optimal platform can handle more data effectively with same resources. AMBA(Advanced Microprocessor Bus Architecture)$^{TM}$ defines on-chip communication standard for designing high performance embedded micro-controllers. It is consisted of AHB, ASB and APB. It can support fast implementation and reliability in system that is composed with reusable IPs. DMAC is one of master in system and generate master signals of AHB to communicate data from one slave(peripheral or memory) to another slave. It can reduce burden of CPU and increase system performance. We designed DMAC based on AMBA and it supports 13 Channels. Each channel can be controlled by software program. It decides channel's priority using round-robin method. It can support P2P, P2M, M2P and P2P communication.

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Analysis of Verification Methodologies Based on a SoC Platform Design

  • Lee, Je-Hoon;Kim, Sang-Choon
    • International Journal of Contents
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    • 제7권1호
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    • pp.23-28
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    • 2011
  • In a SoC (system-on-chip) design, a design complexity is a big bottleneck. In order to overcome the design complexity, platform based design method is widely adopted for designers. Most complex SoCs need a heterogeneous design development environment for hardware and software co-design. In this paper, we discuss about some kinds of verification approaches with platform based design methodology at various abstraction levels of SoC design. We separate the verification process to two steps according to the different levels of verification. We employ a flexible SoC design environment to support simultaneous hardware and software development. We demonstrate the verification strategy of a target SoC design, IEEE 802.11a WLAN SoC.

Design and Implementation of an Enhanced Secure Android-Based Smartphone using LIDS

  • Lee, Sang Hun
    • 디지털산업정보학회논문지
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    • 제8권3호
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    • pp.49-55
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    • 2012
  • Recently, with the rapid development of android-based smartphones, it is becomes a major security issue that the case of Android platform is an open platform. so it is easy to be a target of mobile virus penetration and hacking. Even there are a variety of security mechanisms to prevent the vulnerable points of the Android platform but the reason of most of the security mechanisms were designed at application-level that highly vulnerable to the attacks directly to the operating system or attacks using the disadvantages of an application's. It is necessary that the complementary of the android platform kernel blocks the kernel vulnerability and the application vulnerability. In this paper, we proposed a secure system using linux-based android kernel applied to LIDS(Linux Intrusion Detection and Defense System) and applied a smart phone with s5pc110 chip. As a result, the unauthorized alteration of the application was prevented with a proposed secure system.

ViP: A Practical Approach to Platform-based System Modeling Methodology

  • Um, Jun-Hyung;Hong, Sung-Pack;Kim, Young-Taek;Chung, Eui-Young;Choi, Kyu-Myung;Kong, Jeong-Taek;Eo, Soo-Kwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제5권2호
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    • pp.89-101
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    • 2005
  • Research on highly abstracted system modeling and simulation has received a great deal of attention as of the concept of platform based design is becoming ubiquitous. From a practical design point of view, such modeling and simulation must consider the following: (i) fast simulation speed and cycle accuracy, (ii) early availability for early stage software development, (iii) inter-operability with external tools for software development, and (iv) reusability of the models. Unfortunately, however, all of the previous works only partially addresses the requirements, due to the inherent conflicts among the requirements. The objective of this study is to develop a new system design methodology to effectively address the requirements mentioned above. We propose a new transaction-level system modeling methodology, called ViP (Virtual Platform). We propose a two-step approach in the ViP method. In phase 1, we create a ViP for early stage software development (before RTL freeze). The ViP created in this step provides high speed simulation, lower cycle accuracy with only minor modeling effort.(satisfying (ii)). In phase 2, we refine the ViP to increase the cycle accuracy for system performance analysis and software optimization (satisfying (i)). We also propose a systematic ViP modeling flow and unified interface scheme based on utilities developed for maximizing reusability and productivity (satisfying (ii) and (iv)) and finally, we demonstrate VChannel, a generic scheme to provide a connection between the ViP and the host-resident application software (satisfying (iii)). ViP had been applied to several System-on-a-chip (SoC) designs including mobile applications, enabling engineers to improve performance while reducing the software development time by 30% compared to traditional methods.

Development of Microfluidic Radioimmunoassay Platform for High-throughput Analysis with Reduced Radioactive Waste

  • Jin-Hee Kim;So-Young Lee;Seung-Kon Lee
    • 대한방사성의약품학회지
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    • 제8권2호
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    • pp.95-101
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    • 2022
  • Microfluidic radioimmunoassay (RIA) platform called µ-RIA spends less reagent and shorter reaction time for the analysis compared to the conventional tube-based radioimmunoassay. This study reported the design of µ-RIA chips optimized for the gamma counter which could measure the small samples of radioactive materials automatically. Compared with the previous study, the µ-RIA chips developed in this study were designed to be compatible with conventional RIA test tubes. And, the automatic gamma counter could detect radioactivity from the 125I labeled anti-PSA attached to the chips. Effects of the multi-layer microchannels and two-phase flow in the µ-RIA chips were investigated in this study. The measured radioactivity from the 125I labeled anti-PSA was linearly proportional to the number of stacked chips, representing that the radioactivity in µ-RIA platform could be amplified by designing the chips with multi-layers. In addition, we designed µ-RIA chip to generate liquid-gas plug flow inside the microfluidic channel. The plug flow can promote binding of the biomolecules onto the microfluidic channel surface with recirculation in the liquid phase. The ratio of liquid slug and air slug length was 1 : 1 when the 125I labeled anti-PSA and the air were injected at 1 and 35 µL/min, respectively, exhibiting 1.6 times higher biomolecule attachment compared to the microfluidic chip without the air injection. This experimental result indicated that the biomolecular reaction was improved by generating liquid-gas slugs inside the microfluidic channel. In this study, we presented a novel µ-RIA chips that is compatible with the conventional gamma counter with automated sampler. Therefore, high-throughput radioimmunoassay can be carried out by the automatic measurement of radioactivity with reduced radiowaste generation. We expect the µ-RIA platform can successfully replace conventional tube-based radioimmunoassay in the future.

Investigation of smart multifunctional optical sensor platform and its application in optical sensor networks

  • Pang, C.;Yu, M.;Gupta, A.K.;Bryden, K.M.
    • Smart Structures and Systems
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    • 제12권1호
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    • pp.23-39
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    • 2013
  • In this article, a smart multifunctional optical system-on-a-chip (SOC) sensor platform is presented and its application for fiber Bragg grating (FBG) sensor interrogation in optical sensor networks is investigated. The smart SOC sensor platform consists of a superluminescent diode as a broadband source, a tunable microelectromechanical system (MEMS) based Fabry-P$\acute{e}$rot filter, photodetectors, and an integrated microcontroller for data acquisition, processing, and communication. Integrated with a wireless sensor network (WSN) module in a compact package, a smart optical sensor node is developed. The smart multifunctional sensor platform has the capability of interrogating different types of optical fiber sensors, including Fabry-P$\acute{e}$rot sensors and Bragg grating sensors. As a case study, the smart optical sensor platform is demonstrated to interrogate multiplexed FBG strain sensors. A time domain signal processing method is used to obtain the Bragg wavelength shift of two FBG strain sensors through sweeping the MEMS tunable Fabry-P$\acute{e}$rot filter. A tuning range of 46 nm and a tuning speed of 10 Hz are achieved. The smart optical sensor platform will open doors to many applications that require high performance optical WSNs.

스킨-림프-칩 상에서 LymphanaxTM 의 림프 형성 촉진능 (LymphanaxTM Enhances Lymphangiogenesis in an Artificial Human Skin Model, Skin-lymph-on-a-chip)

  • 박필준;김민섭;최시은;김현수;정석
    • 대한화장품학회지
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    • 제50권2호
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    • pp.119-129
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    • 2024
  • 인체 피부 림프계는 간질액을 배출하고 면역 시스템을 활성화하는 중요한 역할을 한다. 자외선과 자연적인 노화와 같은 환경 요인들은 종종 이러한 림프관의 구조적 변화를 일으키며, 이로 인해 피부 기능 장애를 발생시키기도 한다. 그러나 이러한 연구를 위한 동물 실험 대체 방안이 없기 때문에 여전히 연구를 진행하기엔 적합하지 않은 제한 사항들이 존재한다. 인체 피부 림프계를 더 잘 이해하고 림프관 형성에 관련된 분자 및 생리학적 변화를 조사하기 위해, 생체 모방 미세유체 플랫폼인 'skin-lymph-on-a-chip'을 제작하여, 새로운 체외 인체 피부 림프 모델을 개발하였다. 간단히 말해, 이 플랫폼은 체외에서 분화된 일차 정상 인간 표피 각질형성세포(NHEKs)와 피부 림프 내피세포(HDLECs)를 공동 배양하는 것을 의미한다. 약 500 시간 동안 자연 발효를 통해 확보하고 집약된 인삼 뿌리 추출물인 LymphanaxTM의 림프관 형성 효과를 평가하기 위해 해당 시스템에 적용하였고, 분자 수준 요인들의 변화는 딥러닝 기반 알고리즘을 사용하여 분석하였다. 결론적으로, LymphanaxTM는 skin-lymph-on-a-chip에서 건강한 림프관 형성을 촉진하였고, 그 성분들이 칩내에서 분화된 NHEKs를 거의 침투하지 않는 결과를 통해, HDELCs에 간접적으로 영향을 미쳤음을 확인하였다. 전반적으로, 이 연구는 기존과 차별화된 체외 인체 피부 림프모델 시스템의 확보와 더불어 이를 통한 LymphanaxTM의 림프 활성화 효과에 대한 새로운 관점을 제공한다.

Design and Implementation of a Face Recognition System-on-a-Chip for Wearable/Mobile Applications

  • Lee, Bongkyu
    • 한국멀티미디어학회논문지
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    • 제18권2호
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    • pp.244-252
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    • 2015
  • This paper describes the design and implementation of a System-on-a-Chip (SoC) for face recognition to use in wearable/mobile products. The design flow starts from the system specification to implementation process on silicon. The entire process is carried out using a FPGA-based prototyping platform environment for design and verification of the target SoC. To ensure that the implemented face recognition SoC satisfies the required performances metrics, time analysis and recognition tests were performed. The motivation behind the work is a single chip implementation of face recognition system for target applications.

양자 기술 구현을 위한 칩 제작 인프라 기술 동향 (Trends in Chip Fabrication Infrastructure for Implementation in Quantum Technology)

  • 김진우;문기원;주정진
    • 전자통신동향분석
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    • 제38권1호
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    • pp.9-16
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    • 2023
  • In the rapidly growing field of quantum computing, it is evident that a robust supply chain is needed for commercialization or large-scale production of quantum chips. As a result, the success of many R&D projects worldwide relies on the development of quantum chip foundries. In this paper, a variety of quantum chip foundries, particularly the ones creating photonic integrated circuit (PIC) quantum chips, are reviewed and summarized to demonstrate current technological trends. Global projects aiming to establish new foundries, as well as information regarding their respective funding, are also included to identify the evolutionary direction of quantum computing infrastructure. Furthermore, the potential application of lithium niobate as a novel material platform for quantum chips is also discussed.