• Title/Summary/Keyword: chip control

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Development of robot control system using DSP (DSP를 이용한 로보트 제어시스템 개발)

  • Lee, Bo-Hee;Kim, Jin-Geol
    • Journal of Institute of Control, Robotics and Systems
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    • v.1 no.1
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    • pp.50-57
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    • 1995
  • In this paper, the design and the implementation of the controller for an articulate robot, which is developed in our Automatic Control Laboratory, are mainly discussed. The controller reduces software computational load via distributed processing method using multiple CPU's, and simplifies structures by the time-division control with TMS320C31 DSP chip. The method of control is based on the fuzzy-compensated PID control with scale factor, which compensates for the influence of load variation resulting from the various postures of the robot with conventional PID scheme. The application of the proposed controller to the robot system with DC servo-motors shows some excellent control capabilities. Also, the response characteristics of system for the various trajectory commands verify the superiority of the controller.

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Application Technology Development of Lon Works Fieldbus Network System for Distributed Control System Based Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2004.05a
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    • pp.404-411
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    • 2004
  • With distribution industrial control system, the use of low cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with CPLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS (Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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Development of Intelligent Control Module with ANSI/EIA 709.1 for Water Treatment Facility

  • Hong, Won-Pyo
    • Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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    • 2003.11a
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    • pp.243-249
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    • 2003
  • With distribution industrial control system, the use of tow cost to achieve a highly reliable and safe system in real time distributed embedded application is proposed. This developed intelligent node is based on two microcontrollers, one for the execution of the application code, also as master controller for ensuring the real time control & the logic operation with PLD and other for communication task and the easy control execution, i.e., I/O digital input, digital output and interrupting. This paper also presents where the case NCS(Networked control system) with LonTalk protocol is applied for the filtration process control system of a small water treatment plant.

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The Antitumor Effect of C-terminus of Hsp70-Interacting Protein via Degradation of c-Met in Small Cell Lung Cancer

  • Cho, Sung Ho;Kim, Jong In;Kim, Hyun Su;Park, Sung Dal;Jang, Kang Won
    • Journal of Chest Surgery
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    • v.50 no.3
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    • pp.153-162
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    • 2017
  • Background: The mesenchymal-epithelial transition factor (MET) receptor can be overexpressed in solid tumors, including small cell lung cancer (SCLC). However, the molecular mechanism regulating MET stability and turnover in SCLC remains undefined. One potential mechanism of MET regulation involves the C-terminus of Hsp70-interacting protein (CHIP), which targets heat shock protein 90-interacting proteins for ubiquitination and proteasomal degradation. In the present study, we investigated the functional effects of CHIP expression on MET regulation and the control of SCLC cell apoptosis and invasion. Methods: To evaluate the expression of CHIP and c-Met, which is a protein that in humans is encoded by the MET gene (the MET proto-oncogene), we examined the expression pattern of c-Met and CHIP in SCLC cell lines by western blotting. To investigate whether CHIP overexpression reduced cell proliferation and invasive activity in SCLC cell lines, we transfected cells with CHIP and performed a cell viability assay and cellular apoptosis assays. Results: We found an inverse relationship between the expression of CHIP and MET in SCLC cell lines (n=5). CHIP destabilized the endogenous MET receptor in SCLC cell lines, indicating an essential role for CHIP in the regulation of MET degradation. In addition, CHIP inhibited MET-dependent pathways, and invasion, cell growth, and apoptosis were reduced by CHIP overexpression in SCLC cell lines. Conclusion: C HIP is capable of regulating SCLC cell apoptosis and invasion by inhibiting MET-mediated cytoskeletal and cell survival pathways in NCI-H69 cells. CHIP suppresses MET-dependent signaling, and regulates MET-mediated SCLC motility.

디지털 오디오 복호화 칩의 구현에 관한 연구

  • 차형태
    • Broadcasting and Media Magazine
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    • v.3 no.1
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    • pp.13-19
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    • 1998
  • 본 논고에서는 VHDL ASIC 설계 기술을 사용하여 Chip을 설계할 때에 필요한 사항과 방법 그리고 실제 사용 예로써 MPEG 오디오 Chip의 설계와 구현에 관하여 기술한 것이다. VHDL을 이용한 설계의 흐름도로부터 실제 설계를 위한 방법까지 기술하였고 알고리듬의 최적화를 위한 방법과 그 예를 보이고 있다. 또 Gate를 이용한 Logic Level설계에 익숙하지 않은 설계자도 쉽고 빠르게 사용할 수 있는 VHDL설계 기술을 이용하여 MPEG-2 의 2 채널 모드까지 지원하는 Chip의 설계에 관하여 기술한다. 특히 합성 필터를 설계할때 계산량을 줄이고 RAM의 크기를 줄일 수 있도록 효율적인 구현을 위해 구조를 설계하였으며 ROM에 저장될 합성 필터 계수의 수를 줄이기 위해 노력하였다. 또 합성 필터의 Control을 위하여 Pseudo_RISC개념을 사용하였다.

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A CMOS Temperature Control Circuit for Crystal-on-Chip Oscillator

  • Park, Cheol-Young
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.103-106
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    • 2005
  • This paper reports design and fabrication of CMOS temperature sensor circuit using MOSIS 0.25um CMOS technology. The proposed circuit has a temperature coefficient of $13mV/^{\circ}C$ for a wide operating temperature range with a good linearity. This circuit may be applicable to the design of one-chip IC where quartz crystal resonator is directly mounted on CMOS oscillator chips.

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A study on the analysis of chip flow by the image processing (화상처리를 이용한 칩유동의 해석에 관한 연구)

  • 백인환;이형대
    • 제어로봇시스템학회:학술대회논문집
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    • 1990.10a
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    • pp.811-815
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    • 1990
  • This paper describes the method on image acquisition and image processing in the turning process. The formation of discontinuous chips during high-speed oblique cutting without lubricant was observed by means of video camera recorder and stroboscope. The image processing technique for chip flow is described and the results are presented for variable feeds. It is concluded that experimental values of chip flow angle are similar to theoretical values of Stabler's rule.

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A Study of SMCS Chip Set and S/W Control Procedure (SMCS Chip Set 및 소프트웨어 제어절차 분석)

  • Chae, Dong-Seok;Lee, Jae-Seung;Choi, Jong-Wook;Lee, Jong-In;Kim, Hak-Jung
    • Proceedings of the Korean Information Science Society Conference
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    • 2005.11a
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    • pp.523-525
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    • 2005
  • 인공위성 탑재컴퓨터의 내부 인터페이스를 위하여 SpaceWire 표준을 적용한 SMCS Chip Set의 사용이 고려되고 있다. SpaceWire는 IEEE-1355 프로토콜을 적용한 것으로 위성체 내에서 다양한 모듈들 간에 손쉬운 표준 인터페이스를 제공한다. 또한 다수의 모듈간의 상호 교차 연결을 위한 Cross-Strap 인터페이스 구현이 간단하게 구현될 수 있으므로 위성 운용 기간 중의 높은 신뢰도를 보장할 수 있다. 본 논문에서는 SpaceWire 표준을 적용한 SMCS Chip Set에 대한 소개와 SMCS Chip Set 통한 데이터 전송에 필요한 소프트웨어 제어절차에 대해서 기술하였다.

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High Efficiency 5A Synchronous DC-DC Buck Converter (고효율 5A용 동기식 DC-DC Buck 컨버터)

  • Hwang, In Hwan;Lee, In Soo;Kim, Kwang Tae
    • Journal of Korea Multimedia Society
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    • v.19 no.2
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    • pp.352-359
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    • 2016
  • This paper presents high efficiency 5A synchronous DC-DC buck converter. The proposed DC-DC buck converter works from 4.5V to 18V input voltage range, and provides up to 5A of continuous output current and output voltage adjustable down to 0.8V. This chip is packaged MCP(multi-chip package) with control chip, top side P-CH switch, and bottom side N-CH switch. This chip is designed in a 25V high voltage CMOS 0.35um technology. It has a maximum power efficiency of up to 94% and internal 3msec soft start and fixed 500KHz PWM(Pulse Width Modulation) operations. It also includes cycle by cycle current limit function, short and thermal shutdown protection circuit at 150℃. This chip size is 2190um*1130um includes scribe lane 10um.

A Study on the EHW Chip Architecture (EHW 칩 아키텍쳐에 관한 연구)

  • Kim, Jong-O;Kim, Duck-Soo;Lee, Won-Seok
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.1187-1188
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    • 2008
  • An area of research called evolvable hardware has recently emerged which combines aspects of evolutionary computation with hardware design and synthesis. Evolvable hardware (EHW) is hardware that can change its own circuit structure by genetic learning to achieve maximum adaptation to the environment. In conventional EHW, the learning is executed by software on a computer. In this paper, we have studied and surveyed a gate-level evolvable hardware chip, by integrating both GA hardware and reconfigurable hardware within a single LSI chip. The chip consists of genetic algorithm(GA) hardware, reconfigurable hardware logic, and the control logic. In this paper, we describe the architecture, functions of the chip.

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