• Proceedings of the IEEK Conference
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• 2000.09a
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• pp.79-82
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• 2000

In this paper, the performance of 05-CDMA system with smart antenna is analyzed for different bandwidths (1.25MHz, 5MHz) and different channel environments (rural, urban). For the analysis of smart antenna system, the vector channel having the spatio-temporal correlation is modeled as a time-variant linear filter in time, and each multipath is assumed as a reflective wave from only one direction (only one cluster) in space. Several multipaths within one chip are distinguished into each one and the strongest signal is selected. DS-CDMA system with smart antenna using wider bandwidth present better performance than that using narrow bandwidth. It is shown that the smart antenna is more effective in urban area when using 2D-RAKE receiver.

• Journal of Electrical Engineering and Technology
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• v.6 no.4
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• pp.551-555
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• 2011

The Crab label tag with a loop matching feed and a modified dipole antenna structure was proposed. The antenna impedance is conjugated easily to a radio frequency identification IC chip impedance by a loop matching feed. The reading range of the crab structure tag is 0.9-1.0 m from the upper side of the formula milk can lid. The fabricated label tag size is $44.0{\times}44.0mm^2$. The operating frequency at -3 dB return loss is 861.0-929.0 MHz, and the maximum reading range at the anechoic chamber is 1.5 m.

• Proceedings of the IEEK Conference
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• 2003.07a
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• pp.286-289
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• 2003

In this paper, the performance of W-CDMA system with smart antenna is analyzed for angular spread in spatio-temporal wideband vector channel. We consider correlation between any two elements of antenna array, the angle spread of multipath, and structure of antenna array in this channel model. And each multipath is assumed as a reflective wave from only one direction. Several multipaths within one chip are distinguished into each one and the strongest signal is selected. As a result, the performance of the W-CDMA system with smart antenna in spatio-temporal wideband vector channel has been considerably improved in proportion to the increase of angular spread.

• Proceedings of the IEEK Conference
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• 2002.07c
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• pp.1689-1692
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• 2002

In this paper, the performance of DS-CDMA system with smart antenna is analyzed for different bandwidths (1.25MHz, 5MHz) and different channel environments (rural, urban). For the analysis of smart antenna system, the vector channel having the spatio-temporal correlation is modeled as a time- variant linear filter in time, and each multipath is assumed as a reflective wave from only one direction (only one cluster) in space. Several multipaths within one chip are distinguished into each one and the strongest signal is selected. DS-CDMA system with smart antenna using wider bandwidth present better performance than that using narrow bandwidth. It is shown that the smart antenna is more effective in urban area when using 2D-RAKE receiver.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.05a
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• pp.83-87
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• 2003

본 논문에서는 안테나의 이득을 극대화하기 위해서 Bluetooth PCB Layout 위에 내장형 마이크로 칩 안테나를 직접 설계하여 Bluetooth의 주요 사양인 2.4~2.4835GHz에서 동작할 수 있도록 Bluetooth용 내장형 마이크로 칩 안테나를 설계하였다. Bluetooth PCB Layout 크기는 실제 크기와 같은 54mm$\times$19mm$\times$2.4mm로 설계하고 마이크로 칩 안테나 크기는 11mm$\times$4mm$\times$l.6mm로 설계하여 상용화 된 프로그램인 HFSS에 의해 3.616dBi의 이득을 얻었다. 설계 제작된 Bluetooth용 내장형 마이크로 칩 안테나는 2.45GHz의 중심주파수에서 넓은 대역폭 10.71%을 확인하였다. 또한, 마이크로 칩안테나에서 용량의 변화와 용량의 위치 변화, 급전점의 위치 변화에 따른 공진주파수, 대역폭, 이득 등의 특성을 비교하였고, 제작된 칩안테나의 측정된 방사패턴에서 E-면과 H-면을 비교 분석했다.

• The Proceeding of the Korean Institute of Electromagnetic Engineering and Science
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• v.14 no.2
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• pp.55-67
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• 2003

본 고에서는 차세대 무선통신용 초소형 단말기 구현에서 RF 시스템의 성능 개선에 크게 기여하게 될 RF 집적형 안테나 기술 현황과 향후 발전 방향이 제시된다. 고성능을 유지하면서 초소형 RF 전치단을 실현하기 위한 능동소자와 안테나가 결합하여 복합 기능을 하는 능동 집적 안테나(AIA, Active Integrated Antenna) 기술 현황, RF 시스템 단일 패키지(RF-SOP, System On Package) 형태에 집적 가능한 안테나 및 미래의 꿈인 RF 시스템 단일 칩 (RF-SOC, System On Chip)을 향한 단일 칩 안테나 (AOC, antenna on chip) 기술 동향 등이 기술된다.

• Proceedings of the IEEK Conference
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• 2008.06a
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• pp.211-212
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• 2008

Ceramic chip antenna with exponentially tapered ground and parasitic patch is proposed for UWB system. We obtained the return loss of average -12 dB over the range of $3.1\;{\sim}\;10.6\;GHz$ but average -7.2 dB and -7.9 dB over the range of $7.9\;{\sim}\;9.3\;GHz$ and $10.0\;{\sim}\;10.6\;GHz$ respectively. Also, we obtained the group delay of average 0.603 ㎱. The simulation results by HFSS agreed with the measured results.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.21 no.9
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• pp.971-978
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• 2010

In this paper, we propose a compact multiple meander RFID tag antenna with broadband characteristic. The proposed tag antenna has been designed using the multiple meander form to effectively minimize the U-shaped half wavelength dipole antenna as the radiator part. The commercial tag chip is attached to the upper center of the rectangular shaped feed for impedance matching. The size of the antenna is $20{\times}19.7\;mm^2$ and VSWR<5.8 bandwidth is 855~964 MHz which covers the world UHF RFID bandwidth.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.4
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• pp.3-8
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• 2013

In CDMA-based systems, recently, researches on chip-level equalization have been studied in order to improve receiving performance when supporting high-rate data services. In this paper, we consider a chip-level LMMSE (linear minimum mean-squared error) receiver for D-TxAA (dual stream transmit antenna array) based single stream HSDPA MIMO systems using precoding weights. First, we will derive precoding weights for maximizing the total instantaneous received power. We will also analyze the effects of both transmit delay of precoding weights and mobile velocity on chip-level LMMSE receivers, which is verified through computer simulations in various mobile channel environments.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2003.10a
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• pp.127-130
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• 2003

An RSFQ (Rapid Single Flux Quantum) counter can be used as a frequency divider that was an essential part of a programmable voltage standard chip. The voltage standard chip is composed of two circuit parts, a counter and an antenna Analog signal of tens to hundreds ㎓ may be applied to a finline antenna part. This analog signal can be converted to the stream of SFQ voltage pulses by a DC/SFQ circuit. The number of voltage pulses can be reduced by 2n times when they pass through a counter that is composed of n T Flip-Flops (Toggle Flip-Flop). Such a counter can be used not only as a frequency divider, but also to build a programmable voltage standard chip. So, its application range can be telecommunication, high speed RAM, microprocessor, etc. In this work, we have used Xic, WRspice, and L-meter to design an RSFQ counter. After circuit optimization, we could obtain the bias current margins of the T Flip-Flop circuit to be above 31％ Our RSFQ counter circuit designs were based on the 1 ㎄/$\textrm{cm}^2$ niobium trilayer technology.