• Journal of information and communication convergence engineering
• /
• v.10 no.2
• /
• pp.194-199
• /
• 2012

This paper proposes a novel scheme of a gray scale fingerprint image for a high-accuracy capacitive sensor chip. The conventional grayscale image scheme uses a digital-to-analog converter (DAC) of a large-scale layout or charge-pump circuit with high power consumption and complexity by a global clock signal. A modified capacitive detection circuit for the charge sharing scheme is proposed, which uses a down literal circuit (DLC) with a floating-gate metal-oxide semiconductor transistor (FGMOS) based on a neuron model. The detection circuit is designed and simulated in a 3.3 V, 0.35 ${\mu}m$ standard CMOS process. Because the proposed circuit does not need a comparator and peripheral circuits, the pixel layout size can be reduced and the image resolution can be improved.

• Proceedings of the KIPE Conference
• /
• 2018.11a
• /
• pp.36-38
• /
• 2018

As the battery capacity requirement increases, battery cells are connected in a parallel configuration. However, the sharing current of each battery cell becomes unequal due to the imbalance between cell's impedance which results the mismatched states of charge (SOC). The conventional fixed-resistance balancing methods have a limitation in battery equalization performance and system efficiency. This paper proposes a battery equalization method based on dynamic resistance technique, which can improve equalization performance and reduce the loss dissipation. Based on the SOC rate of parallel connected battery cells, the switches in the equalization circuit are controlled to change the equivalent series impedance of the parallel branch, which regulates the current flow to maximize SOC utilization. To verify the method, operations of 4 parallel-connected 18650 Li-ion battery cells with 3.7V-2.6Ah individually are simulated on Matlab/Simulink. The results show that the SOCs are balanced within 1% difference with less power dissipation over the conventional method.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.26 no.4
• /
• pp.249-255
• /
• 2021

A novel current balancing technique for multichannel light-emitting diode (LED) that uses a series resonance and coupled inductor is proposed in this paper. The proposed LED driver balances output currents through frequency control and enables zero-voltage switching. The proposed converter utilizes the charge balance condition of the resonant capacitor and the current sharing function of the coupled inductor to achieve whole LED current balancing without an additional controller. The proposed coupled inductor can integrate the current balancing function and the resonant inductor, so the power density can be increased by reducing the number of magnetic devices. A 40 W prototype is built to verify the validity of this LED driver, and the experimental results are successfully obtained.

• Proceedings of the KIPE Conference
• /
• 2000.07a
• /
• pp.493-497
• /
• 2000

A battery is the device that transforms the chemical energy into the direct-current electrical energy without a mechanical process. Unit cells are connected in series to obtain the required voltage while being connected in parallel to organize capacity for load current. Because the voltage drop down in one set of battery is faster than in two one it may result in the low efficiency of power converter with the voltage drop and cause the system shutdown. However when the system being shutdown. However when the system being driven in parallel a circular-current can be generated,. It is shown that as a result the new batteries are heated by over-charge and over-discharge and the over charge current increases rust of the positive grid and consequently shortens the lifetime of the new batteries. The difference between the new batteries and old ones is the amount of internal resistance. In this paper we can detect the unbalance current using the microprocessor and achieve the balance current by adjusting resistance of each set, The internal resistance of each set becomes constant and the current of charge and discharge comes to be balanced by inserting the external resistance into the system and calculating the change of internal resistance.

• ETRI Journal
• /
• v.9 no.1
• /
• pp.97-103
• /
• 1987

짧은 채널($L<1\mum$) MOSFET의 전기적 변수, 특히 문턱전압(threshold voltage)을 최적화시키기 위하여 분석적 문턱전압 모델을 개발하였다. 채널 영역에서의 붕소profile은 계단 (step) profile로 근사시켜 표면전하층과 기판전하층으로 구성하였다. 최대공핍층내에 있는 두 전하층의 각각에 대하여 기하학적으로 근사시킨 전하분배(charge sharing)모델을 적용하고 이차원적 분석을 이용하여 짧은 채널 효과를 계산하였다. 본 모델을 실험치와 비교하고 이온주입 공정의 최적조건을 이끌어내는 데 필요한 변수에 대하여 논의하였다.

• Journal of the Institute of Electronics Engineers of Korea SD
• /
• v.47 no.12
• /
• pp.31-38
• /
• 2010

This paper presents the design of a graphic memory for QVGA-scale LCD Driver IC (LDI). The graphic memory is designed based on the pseudo-SHAM for the purpose of small area, and the memory cell structure is designed using a bit line partitioning method to improve sensing characteristics and drivabilties in the line-read operation. Also, a collision protection circuit using C-gate is designed to control collisions between read/write operations and self-refresh/line-read operations effectively. The graphic memory circuit has been designed in transistor level using $0.18{\mu}m$ CMOS technology library and the operations of the graphic memory have been verified using Hspice. The results show that the bit-bitb line voltage difference, ${\Delta}V$ increases by 40%, the charge sharing time between bit and bitb voltages $T_{CHGSH}$ decreases by 30%, and the current during line-read decreases by 40%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2012.10a
• /
• pp.285-288
• /
• 2012

Since the non-overlapping gate driver used in conventional DC-DC boost converters generates fixed dead-times, the converters suffer from the body-diode conduction loss or the charge-sharing loss. To reduce the efficiency degradation due to these losses, this paper presents a PWM DC-DC boost converter with adaptive dead-time control. In light loads, power switching is also employed to increase the efficiency. The designed DC-DC boost converter can thus achieve high efficiency at wide current range. The proposed DC-DC boost converter has 3.3V output from a 2.5V input with 0.18um technology. It operates at 500KHz and has a maximum power efficiency of 97.8%.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
• /
• 2013.10a
• /
• pp.361-364
• /
• 2013

Since the non-overlapping gate driver used in conventional DC-DC boost converters generates fixed dead-times, the converters suffer from the body-diode conduction loss or the charge-sharing loss. A adaptive control method has been proposed to reduce these loses. In this method, however, occurrence of and overlapping time of two power transistors in CCM results in reduction of efficiency. In this paper, to overcome this problem a new adaptive control method in proposed, and a DC-DC boost converter with the proposed adaptive control and power switching has been designed in a 0.35um CMOS process. The designed converter outputs 3.3V from a input voltage of 2.5V. The switching frequency is 500kHz and the maximum power efficiency is 95.3% at a load current 150mA. The designed chip area is $1720um{\times}1280um$.

• Journal of the Korean Regional Science Association
• /
• v.37 no.1
• /
• pp.45-61
• /
• 2021

This research purposes to design a methodological framework to suggest the optimal method to resolve the conflicts of stakeholders surrounding the water use charge of the Han River region, and to use the analysis results to provide the direction of policy. For this, it was preceded that the process of understanding the mechanisms of the multifaceted conflict between decision makers taking different positions over water use charge of the Han River region, and an optimal method to resolve the conflict of water use charge of the Han River region was derived by using a graph model for conflict resolution(GMCR). According to the analysis results, the optimal state to find a solution to the water use charge of the Han River is that the Seoul-Incheon-Gyeonggi region pays the charge according to the original rate while Seoul-Incheon requesting discount the water use rate. In addition, the Han River management committee should establish policies desired by Seoul-Incheon-Gyeonggi region including rationalization of the decision-making structure to determine the rate of water use charge, making the basis to support the Han River management fund system for the Seoul-Incheon region, and transparent management of the Han River management fund system considering the characteristics of beneficiary regions and residents. This study is expected to provide objective decision-making information in establishing environmental policy directions related to conflict resolution in the water use charge of the Han River region and to offer a methodological basis for similar follow-up studies related to conflicts derived from sharing nature environment.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.12 no.5
• /
• pp.400-408
• /
• 2007

In this paper, development of the 8kW parallel module converter is presented. For a effective configuration of FB-PWM converter, this paper proposes 4-parallel operation of 2 kw-module. FB converter of 2-kW module is controlled by phase shut PWM and in order to achieve ZVZCS, the simple auxiliary circuit is applied in secondary side. In order to achieve ZCS, control logic for auxiliary circuit operation is designed to reset the primary current during free-wheeling period. For output current sharing of 4-modules, the charge control is employed. The charge control logic is designed with phase shift PWM logic. Voltage controller is implemented by using DSP(TMS320LF2406) with A/D conversion data of the output current and voltage of each module. The developed converter is installed in PCU(Power Conditioning Unit) for HSG(High Speed Generator) in a vehicle and health monitoring system is implemented for vehicle operation test. Finally, performance of the developed converter is proved under practical operation of HSG.