• 한국전산유체공학회:학술대회논문집
• /
• 2010.05a
• /
• pp.21-27
• /
• 2010

The flow characteristics on a supersonic inlet with bleeding system by changing angles of attack and channel length conditions are studied by computational 3D turbulent flow analysis. A compressible upwind flux difference splitting Navier-Stokes method with $k-{\omega}$ turbulence model is used to analysis the inlet flowfield. More non-uniform flowfields are shown at the AIP when angle of attack becomes bigger and bigger. These non-uniform flowfield works the performance aggravating factors of the supersonic engine. Non-uniform flowfield by changing channel length at the various angle of attack are investigated.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.17 no.10
• /
• pp.1034-1040
• /
• 2004

The latch-up current and switching characteristics of MOS-Controlled Thyristor(MCT) are studied with variation of the channel length and impurity concentration. The proposed MCT power device has the lateral structure and P-epitaxial layer in substrate. Two dimensional MEDICI simulator is used to study the latch-up current and forward voltage-drop from the characteristics of I-V and the switching characteristics with variation of impurity concentration. The channel length and impurity concentration of the proposed MCT power device show the strong affect on the anode current and turn-off time. The increase of impurity concentration in P and N channels is found to give the increase of latch-up current and forward voltage-drop.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.11 no.2
• /
• pp.130-133
• /
• 2011

A comparative study of two capacitance methods to measure the effective channel length in deep-submicron MOSFETs has been made in detail. Since the reduction of the overlap capacitance in the accumulation region is smaller than the addition of the inner fringe capacitance at zero gate voltage, the capacitance method removing the parasitic capacitance in the accumulation region extracts a more accurate effective channel length than the method removing that at zero gate voltage.

• Journal of Communications and Networks
• /
• v.18 no.1
• /
• pp.40-49
• /
• 2016

In this paper, we present a symbol-level iterative source-channel decoding (ISCD) algorithm for reliable transmission of variable-length codes (VLCs). Firstly, an improved source a posteriori probability (APP) decoding approach is proposed for packetized variable-length encoded Markov sources. Also proposed is a recursive implementation based on a three-dimensional joint trellis for symbol decoding of binary convolutional codes. APP channel decoding on this joint trellis is realized by modification of the Bahl-Cocke-Jelinek-Raviv algorithm and adaptation to the non-stationary VLC trellis. Simulation results indicate that the proposed ISCD scheme allows to exchange between its constituent decoders the symbol-level extrinsic information and achieves high robustness against channel noises.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
• /
• v.31 no.5
• /
• pp.278-282
• /
• 2018

We propose a SPICE model of drain-induced barrier lowering (DIBL) for a junctionless cylindrical surrounding gate (JLCSG) MOSFETs. To this end, the potential distribution in the channel is obtained via the Poisson equation, and the threshold voltage model is presented for the JLCSG MOSFET. In a JLCSG nano-structured MOSFET, a channel radius affects the carrier transfer as well as the channel length and oxide thickness; therefore, DIBL should be expressed as a function of channel length, channel radius, and oxide thickness. Consequently, it can be seen that DIBLs are proportional to the power of -3 for the channel length, 2 for the channel radius, 1 for the thickness of the oxide film, and the constant of proportionality is 18.5 when the SPICE parameter, the static feedback coefficient ${\eta}$, is between 0.2 and 1.0. In particular, as the channel radius and the oxide film thickness increase, the value of ${\eta}$ remains nearly constant.

• Journal of the Korean Institute of Telematics and Electronics
• /
• v.25 no.11
• /
• pp.1286-1293
• /
• 1988

A general closed form expression for the channel length of the self-aligned double-diffused MOS transistor is obtained from the 2-dimensional Gaussian doping profile. The proposed model in this paper is composed of the doping concentration of the substrate, the final surface doping concentration and the vertical junction depth of the each double-diffused region. The calculated channel length is in good agreement with the experimental results. Also, the optimum channel structure for the prevention of the channel puncthrough is obtained by the averaged doping concentration in the channel region. A correspondence between the results of device simulation of channel punchthrough and the estimations of simplified model is confirmed.

• JSTS:Journal of Semiconductor Technology and Science
• /
• v.9 no.3
• /
• pp.136-147
• /
• 2009

In this paper we analyze the influence of source/drain (S/D) extension region design for minimizing short channel effects (SCEs) in 25 nm gate length single and double gate Silicon-on-Insulator (SOI) and Germanium-on-Insulator (GOI) MOSFETs. A design methodology, by evaluatingm the ratio of the effective channel length to the natural length for the different devices (single or double gate FETs) and technology (SOI or GOI), is proposed to minimize short channel effects (SCEs). The optimization of non-overlapped gate-source/drain i.e. underlap channel architecture is extremely useful to limit the degradation in SCEs caused by the high permittivity channel materials like Germanium as compared to that exhibited in Silicon based devices. Subthreshold slope and Drain Induced Barrier Lowering results show that steeper S/D gradients along with wider spacer regions are needed to suppress SCEs in GOI single/double gate devices as compared to Silicon based MOSFETs. A design criterion is developed to evaluate the minimum spacer width associated with underlap channel design to limit SCEs in SOI/GOI MOSFETs.

• Journal of the Korean Society of Industry Convergence
• /
• v.24 no.6_1
• /
• pp.683-691
• /
• 2021

Bipolar plates with channel width of 0.5 mm, 0.4 mm, and 0.3 mm respectively were printed using a 3D printer. The shape of three b ipolar plates was rectangular, the channel depth was 0.5 mm, and the thickness of base was 0.5 mm. The bipolar plate with channel width of 0.5 mm had 45 channels, and their active area was 44.5 mm × 50 mm. The bipolar plate with channel width of 0.4 mm had 57 channels and its active area was 45.2 mm × 50 mm, and the bipolar plate with channel width of 0.3 mm had 75 channels and its active area was 44.7 mm × 50 mm. The bipolar plates were printed using PLA filament. The cross-sectional lengths of the bipolar plates with channel widths of 0.5 mm and 0.4 mm were identical by 96% of the designed cross-sectional length. Whereas the bipolar plate with a channel length of 0.3 mm had a large difference of 25% from the designed cross-sectional length.

• Journal of information and communication convergence engineering
• /
• v.5 no.1
• /
• pp.45-49
• /
• 2007

The analytical transport model in subthreshold regime for double gate MOSFET has been presented to analyze the short channel effects such as subthreshold swing, threshold voltage roll-off and drain induced barrier lowering. The present approach includes the quantum tunneling of carriers through the source-drain barrier. Poisson equation is used for modeling thermionic emission current, and Wentzel-Kramers-Brillouin approximations are applied for modeling quantum tunneling current. This model has been used to investigate the subthreshold operations of double gate MOSFET having the gate length of the nanometer range with ultra thin gate oxide and channel thickness under sub-20nm. Compared with results of two dimensional numerical simulations, the results in this study show good agreements with those for subthreshold swing and threshold voltage roll-off. Note the short channel effects degrade due to quantum tunneling, especially in the gate length of below 10nm, and DGMOSFETs have to be very strictly designed in the regime of below 10nm gate length since quantum tunneling becomes the main transport mechanism in the subthreshold region.

• Journal of Korea Water Resources Association
• /
• v.37 no.8
• /
• pp.623-630
• /
• 2004

In this paper, the hydraulic model tests are conducted for the hydraulic characteristics at channel junctions. The experiments are examined through the variation of approaching angle, discharge in the upstream main channel and the discharge ratio between the main channel and the tributary. The experiments are conducted in the channel model having the length of 450cm, the widths of 40cm and 32cm. Four water tanks and pumps are installed in the experimental channel. The length of stagnation zone is increased by Increasing of approaching angle and the discharge in the upstream channel. The length of stagnation increase with the discharge ratio between the main channel and the tributary. However, the variation of the stagnation zone near the channel junctions is little at the same approaching angles and the discharge ratioes between the main channel and tributary. However, the variation of the stagnation zone near the channel junctions is little at the same approaching angles and the discharge ratioes between the main channel and tributary. Accelerating zone of the velocity is occurred in the middle of the channel in the small approaching angle. However, the influence zone of the accelerating velocity is increased by increasing the approaching angle.