Analysis of Positive Bias Temperature Instability Degradation Mechanism in n+ and p+ poly-Si Gates of High-Voltage SiO2 Dielectric nMOSFETs (고전압 SiO2 절연층 nMOSFET n+ 및 p+ poly Si 게이트에서의 Positive Bias Temperature Instability 열화 메커니즘 분석)
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- The Journal of Korea Institute of Information, Electronics, and Communication Technology
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- v.16 no.4
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- pp.180-186
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- 2023