• Title/Summary/Keyword: cache storage

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SSD Cache for RAID: Integrating Data Caching and Parity Update Delay (RAID를 위한 SSD 캐시: 데이터 캐싱과 패리티 갱신 지연 기법의 결합)

  • Minh, Sophal;Lee, Donghee
    • KIISE Transactions on Computing Practices
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    • v.23 no.6
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    • pp.379-385
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    • 2017
  • In enterprise environments, hybrid storage typically utilizes SSDs over disk-based RAID. Typically, SSDs over RAID are used as the data cache. Recently, the LeavO caching scheme was introduced to reduce the parity update overhead of the underlying RAID. In this paper, we combine the data caching and LeavO caching schemes and derive cost models of the combined cache to determine the optimal data and LeavO cache sizes. We also propose the Adaptive Combined Cache that dynamically adjusts the data cache and LeavO cache sizes for evolving workloads. Experimental results show that the performance of the Adaptive Combined Cache is significantly superior to that of the conventional data caching scheme and is comparable with that of the off-line optimal scheme.

Divided Disk Cache and SSD FTL for Improving Performance in Storage

  • Park, Jung Kyu;Lee, Jun-yong;Noh, Sam H.
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.15-22
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    • 2017
  • Although there are many efficient techniques to minimize the speed gap between processor and the memory, it remains a bottleneck for various commercial implementations. Since secondary memory technologies are much slower than main memory, it is challenging to match memory speed to the processor. Usually, hard disk drives include semiconductor caches to improve their performance. A hit in the disk cache eliminates the mechanical seek time and rotational latency. To further improve performance a divided disk cache, subdivided between metadata and data, has been proposed previously. We propose a new algorithm to apply the SSD that is flash memory-based solid state drive by applying FTL. First, this paper evaluates the performance of such a disk cache via simulations using DiskSim. Then, we perform an experiment to evaluate the performance of the proposed algorithm.

A Dynamic Hashing Based Load Balancing for a Scalable Wireless Internet Proxy Server Cluster (확장성 있는 무선 인터넷 프록시 서버 클러스터를 위한 동적 해싱 기반의 부하분산)

  • Kwak, Hu-Keun;Kim, Dong-Seung;Chung, Kyu-Sik
    • The KIPS Transactions:PartA
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    • v.14A no.7
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    • pp.443-450
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    • 2007
  • Performance scalability and storage scalability become important in a large scale cluster of wireless internet proxy cache servers. Performance scalability means that the whole performance of the cluster increases linearly according as servers are added. Storage scalability means that the total size of cache storage in the cluster is constant, regardless of the number of cache servers used, if the whole cache data are partitioned and each partition is stored in each server, respectively. The Round-Robin based load balancing method generally used in a large scale server cluster shows the performance scalability but no storage scalability because all the requested URL data need to be stored in each server. The hashing based load balancing method shows storage scalability because all the requested URL data are partitioned and each partition is stored in each server, respectively. but, it shows no performance scalability in case of uneven pattern of client requests or Hot-Spot. In this paper, we propose a novel dynamic hashing method with performance and storage scalability. In a time interval, the proposed scheme keeps to find some of requested URLs allocated to overloaded servers and dynamically reallocate them to other less-loaded servers. We performed experiments using 16 PCs and experimental results show that the proposed method has the performance and storage scalability as different from the existing hashing method.

Energy and Performance-Efficient Dynamic Load Distribution for Mobile Heterogeneous Storage Devices (에너지 및 성능 효율적인 이종 모바일 저장 장치용 동적 부하 분산)

  • Kim, Young-Jin;Kim, Ji-Hong
    • Journal of the Korea Society of Computer and Information
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    • v.14 no.4
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    • pp.9-17
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    • 2009
  • In this paper, we propose a dynamic load distribution technique at the operating system level in mobile storage systems with a heterogeneous storage pair of a small form-factor and disk and a flash memory, which aims at saving energy consumption as well as enhancing I/O performance. Our proposed technique takes a combinatory approach of file placement and buffer cache management techniques to find how the load can be distributed in an energy and performance-aware way for a heterogeneous mobile storage air of a hard disk and a flash memory. We demonstrate that the proposed technique provides better experimental results with heterogeneous mobile storage devices compared with the existing techniques through extensive simulations.

Design and Implementation of an In-Memory File System Cache with Selective Compression (대용량 파일시스템을 위한 선택적 압축을 지원하는 인-메모리 캐시의 설계와 구현)

  • Choe, Hyeongwon;Seo, Euiseong
    • Journal of KIISE
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    • v.44 no.7
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    • pp.658-667
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    • 2017
  • The demand for large-scale storage systems has continued to grow due to the emergence of multimedia, social-network, and big-data services. In order to improve the response time and reduce the load of such large-scale storage systems, DRAM-based in-memory cache systems are becoming popular. However, the high cost of DRAM severely restricts their capacity. While the method of compressing cache entries has been proposed to deal with the capacity limitation issue, compression and decompression, which are technically difficult to parallelize, induce significant processing overhead and in turn retard the response time. A selective compression scheme is proposed in this paper for in-memory file system caches that rapidly estimates the compression ratio of incoming cache entries with their Shannon entropies and compresses cache entries with low compression ratio. In addition, a description is provided of the design and implementation of an in-kernel in-memory file system cache with the proposed selective compression scheme. The evaluation showed that the proposed scheme reduced the execution time of benchmarks by approximately 18% in comparison to the conventional non-compressing in-memory cache scheme. It also provided a cache hit ratio similar to the all-compressing counterpart and reduced 7.5% of the execution time by reducing the compression overhead. In addition, it was shown that the selective compression scheme can reduce the CPU time used for compression by 28% compared to the case of the all-compressing scheme.

Design and Implementation of Transactional Write Buffer Cache with Storage Class Memory (트랜잭션 단위 쓰기를 보장하는 스토리지 클래스 메모리 쓰기 버퍼캐시의 설계 및 구현)

  • Kim, Young-Jin;Doh, In-Hwan;Kim, Eun-Sam;Choi, Jong-Moo;Lee, Dong-Hee;Noh, Sam-H.
    • Journal of KIISE:Computing Practices and Letters
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    • v.16 no.2
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    • pp.247-251
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    • 2010
  • Using SCM in storage systems introduce new potentials for improving I/O performance and reliability. In this paper, we study the use of SCM as a buffer cache that guarantees transactional unit writes. Our proposed method can improve storage system reliability and performance at the same time and can recover the storage system immediately upon a system crash. The Proposed method is based on the LINUX JBD(Journaling Block Device), thus reliability is equivalent to JBD. In our experiments, the file system that adopts our method shows better I/O performance even while guaranteeing high reliability and shows fast file system recovery time (about 0.2 seconds).

WWCLOCK: Page Replacement Algorithm Considering Asymmetric I/O Cost of Flash Memory (WWCLOCK: 플래시 메모리의 비대칭적 입출력 비용을 고려한 페이지 교체 알고리즘)

  • Park, Jun-Seok;Lee, Eun-Ji;Seo, Hyun-Min;Koh, Kern
    • Journal of KIISE:Computing Practices and Letters
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    • v.15 no.12
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    • pp.913-917
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    • 2009
  • Flash memories have asymmetric I/O costs for read and write in terms of latency and energy consumption. However, the ratio of these costs is dependent on the type of storage. Moreover, it is becoming more common to use two flash memories on a system as an internal memory and an external memory card. For this reason, buffer cache replacement algorithms should consider I/O costs of device as well as possibility of reference. This paper presents WWCLOCK(Write-Weighted CLOCK) algorithm which directly uses I/O costs of devices along with recency and frequency of cache blocks to selecting a victim to evict from the buffer cache. WWCLOCK can be used for wide range of storage devices with different I/O cost and for systems that are using two or more memory devices at the same time. In addition to this, it has low time and space complexity comparable to CLOCK algorithm. Trace-driven simulations show that the proposed algorithm reduces the total I/O time compared with LRU by 36.2% on average.

BLOCS: Block Correlation Aware Sequential Pattern Mining based Caching Algorithm for Hybrid Storages (BLOCS: 블록 상관관계를 인지하는 시퀀스 패턴 마이닝 기반 하이브리드 스토리지 캐슁 알고리즘)

  • Lee, Seongjin;Won, Youjip
    • Journal of the Korea Society of Computer and Information
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    • v.19 no.7
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    • pp.113-130
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    • 2014
  • In this paper, we propose BLOCS algorithm to find sequence of data that should be saved in cache device of hybrid storage system which uses SSD as a cache device. BLOCS algorithm which uses a sequence pattern mining scheme, creates a set of frequently requested sectors with respect to requested order of sectors. To compare the performance of the proposed scheme, we introduce Distance (DIST) based scheme, Request Frequency (FREQ) based scheme, and Frequency times Size (F-S) based scheme. We measure the hit ratio and I/O latency of different caching schemes using hybrid storage caching simulator. We acquired booting workload along with ten scenarios of launching applications and use the workloads as input to the cache simulator. After experiment with booting workload, we find that BLOCS scheme gives hit ratio of 61% which is about 15% higher than the least performing DIST scheme.

Design of Push Agent Model Using Dual Cache for Increasing Hit-Ratio of Data Search (데이터 검색의 적중률 향상을 위한 이중 캐시의 푸시 에이전트 모델 설계)

  • Kim Kwang-jong;Ko Hyun;Kim Young-ja;Lee Yon-sik
    • Journal of the Korea Society of Computer and Information
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    • v.10 no.6 s.38
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    • pp.153-166
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    • 2005
  • Existing single cache structure has shown difference of hit-ratio according to individually replacement strategy However. It needs new improved cache structure for reducing network traffic and providing advanced hit-ratio. Therefore, this Paper design push agent model using dual cache for increasing hit-ratio by reducing server overload and network traffic by repetition request of persistent and identical information. In this model proposes dual cache structure to do achievement replace gradual cache using by two caches storage space for reducing server overload and network traffic. Also, we show new cache replace techniques and algorithms which executes data update and delete based on replace strategy of Log(Size) +LRU, LFU and PLC for effectiveness of data search in cache. And through an experiment, it evaluates Performance of dual cache push agent model.

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An Efficient Variable Rearrangement Technique for STT-RAM Based Hybrid Caches

  • Youn, Jonghee M.;Cho, Doosan
    • IEMEK Journal of Embedded Systems and Applications
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    • v.11 no.2
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    • pp.67-78
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    • 2016
  • The emerging Spin-Transfer Torque RAM (STT-RAM) is a promising component that can be used to improve the efficiency as a result of its high storage density and low leakage power. However, the state-of-the-art STT-RAM is not ready to replace SRAM technology due to the negative effect of its write operations. The write operations require longer latency and more power than the same operations in SRAM. Therefore, a hybrid cache with SRAM and STT-RAM technologies is proposed to obtain the benefits of STT-RAM while minimizing its negative effects by using SRAM. To efficiently use of the hybrid cache, it is important to place write intensive data onto the cache. Such data should be placed on SRAM to minimize the negative effect. Thus, we propose a technique that optimizes placement of data in main memory. It drives the proper combination of advantages and disadvantages for SRAM and STT-RAM in the hybrid cache. As a result of the proposed technique, write intensive data are loaded to SRAM and read intensive data are loaded to STT-RAM. In addition, our technique also optimizes temporal locality to minimize conflict misses. Therefore, it improves performance and energy consumption of the hybrid cache architecture in a certain range.