• Journal of the Korea Institute of Information and Communication Engineering
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• v.10 no.6
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• pp.1045-1054
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• 2006

In this paper, described a design result of bus interface modulo for multiple level MU-SID-1553 data bus network. In general, MIL-SID-1553 network is used for single level data bus topology. But, according to applied system's structure. multiple level bus architecture is required., And for his, micro processor must be involved for system be, and a additional hardware and software functions are needed. The designed data bus interface module is simply consists of communication transceivers and simple electronic circuit without micro processor. Through the hardware testing and software simulation, the functional performance of the designed interface module was successfully validated.

• Proceedings of the KIEE Conference
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• 1998.11a
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• pp.311-315
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• 1998

Load Flow calculation methods can usually be divided into Gauss-Seidel method, Newton-Raphson method and decoupled method. Load flow calculation is a basic on-line or off-line process for power system planning, operation, control and state analysis. These days Newton-Raphson method is mainly used since it shows remarkable convergence characteristics. It, however, needs considerable calculation time in construction and calculation of inverse Jacobian matrix. In addition to that, Newton-Raphson method tends to fail to converge when system loading is heavy and system has a large R/X ratio. In this paper, matrix equation is used to make algebraic expression and then to solve load flow equation and to modify above defects. And it preserve certain part of Jacobian matrix to shorten the time of calculation. Application of mentioned algorithm to 14 bus, 39 bus, 118 bus systems led to identical result and the number of iteration got by Newton-Raphson method. The effect of time reduction showed about 28%, 30%, at each case of 39 bus, 118 bus system.

• 한국ITS학회:학술대회논문집
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• 2008.11a
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• pp.500-507
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• 2008

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.22 no.1
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• pp.51-58
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• 2022

This paper proposes new measures to aid the uses of pubic transport buses by visually impaired people. Many visually impaired people have difficulty using public buses, but current guidance systems and braille blocks are not useful enough, according to a national survey(2017). In this paper, we develop a system with three functions that help to increase the bus accessibility and mobility of visually impaired people: (1)bus reservation using smart phone applications, (2)arrival notification, and (3)wireless bus stop button using Beacon. Experiments have confirmed that our system supports bus reservation, boarding and getting off the bus efficiently.

• 전기의세계
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• v.21 no.4
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• pp.39-44
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• 1972

This paper describes a new approach for minimizing working memory spaces without loosing too much amount of computing time in the analysis of power system faults. This approach requires the decomposition of alrge power system into several small groups of subsystems, forms individual bus impedance matrics, store them in the auxiliary memory, later assembles them to the original total system by algorithms. And also the approach uses techniques for diagonalizing primitive impedances and expanding the system bus impedance matrices by adding a fault bus. These scheme ensures a remarkable savings of working storage and continous computations of fault currents and voltages with the voried fault locations.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.2
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• pp.132-140
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• 2002

This paper presents an ARM-based SOC bus transaction verification IP and the usage experiences in SOC designs. The verification IP is an AMBA AHB protocol checker, which captures legal AHB transactions in FSM-style signal sequence checking routines. This checker can be considered as a reusable verification IP since it does not change unless the bus protocol changes. Our AHB protocol checker is designed to be scalable to any number of AHB masters and reusable for various AMBA-based SOC designs. The keys to the scalability and the reusability are Object-Oriented Programming (OOP), virtual port, and bind operation. This paper describes how OOP, virtual port, and bind features are used to implement AHB protocol checker. Using the AHB protocol checker, an AHB simulation monitor is constructed. The monitor checks the legal bus arbitration and detects the first cycle of an AHB transaction. Then it calls AHB protocol checker to check the expected AHB signal sequences. We integrate the AHB bus monitor into Verilog simulation environment to replace time-consuming visual waveform inspection, and it allows us to find design bugs quickly. This paper also discusses AMBA AHB bus transaction coverage metrics and AHB transaction coverage analysis. Test programs for five AHB masters of an SOC, four channel DMAs and a host interface unit are executed and transaction coverage for DMA verification is collected during simulation. These coverage results can be used to determine the weak point of test programs in terms of the number of bus transactions occurred and guide to improve the quality of the test programs. Also, the coverage results can be used to obtain bus utilization statistics since the bus cycles occupied by each AHB master can be obtained.

• Journal of the Institute of Convergence Signal Processing
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• v.6 no.1
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• pp.1-7
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• 2005

This paper describes the system for detecting vehicles in the rear and rear-side that access between sidewalk and bus stopped to city road at day by computer vision-based method. This system informs appearance of vehicles to bus driver and passenger for the safety of a bus passenger getting off. The camera mounted on the top portion of the bus exit door gets the rear and rear-side image of the bus whenever a bus stops at the stop. The system sets search area between bus and sidewalk from this image and detects a vehicle by using change of image and sobel filtering in this area. From a central point of the vehicle detected, we can find out the distance, speed and direction by its location, width and length. It alarms the driver and passengers when it's judged that dangerous situation for the passenger getting off happens. This experiment results in a detection rate more than 87% in driving by bus on the road.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.54 no.5
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• pp.226-233
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• 2005

As the power demand has been increasing, a fault current problem is becoming more serious in real power system. Various ways like bus-split operation, transmission line open operation, are used in Korean power system for solving the problem. In this time, superconducting FCL(Fault Current Limiter) has been developed as a vary attractive alternative since HTS(High Temperature Superconductivity) was discovered. Korea, a project developing superconducting FCL to apply to 154kV transmission system is proceeding. Therefore, a power system analysis for SFCL application to power system is necessary, This paper presents the determination of quenching resistance and the selection of optimal cites when 154kV HTS-FCL is applied to Korean power system.

• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.9
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• pp.1081-1087
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• 1999

Load Flow calulation methods can usually be divided into Gauss-Seidel method, Newton-Raphson method and decoupled method. Load flow calculation is a basic on-line or off-line process for power system planning. operation, control and state analysis. These days Newton-Raphson method is mainly used since it shows remarkable convergence characteristics. It, however, needs considerable calculation time in construction and calculation of inverse Jacobian matrix. In addition to that, Newton-Raphson method tends to fail to converge when system loading is heavy and system has a large R/X ratio. In this paper, matrix equation is used to make algebraic expression and then to slove load flow equation and to modify above defects. And it preserve P-Q bus part of Jacobian matrix to shorten computing time. Application of mentioned algorithm to 14 bus, 39 bus, 118 bus systems led to identical results and the same numbers of iteration obtained by Newton-Raphson method. The effect of computing time reduction showed about 28% , 30% , at each case of 39 bus, 118 bus system.

• Transactions on Electrical and Electronic Materials
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• v.17 no.1
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• pp.1-6
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• 2016

Ensuring the secure operation of power systems has become an important and critical matter during the present time, along with the development of large, complex and load-increasing systems. Security constraints such as the thermal limits of transmission lines and bus-voltage limits must be satisfied under all of a system’s operational conditions. An alternative solution to improve the security of a power system is the employment of Flexible Alternating-Current Transmission Systems (FACTS). FACTS devices can reduce the flows of heavily loaded lines, maintain the bus voltages at desired levels, and improve the stability of a power network. The Unified Power Flow Controller (UPFC) is a versatile FACTS device that can independently or simultaneously control the active power, the reactive power and the bus voltage; however, to achieve such functionality, it is very important to determine the optimal location of the UPFC device, with the appropriate parameter setting, in the power system. In this paper, a genetic algorithm (GA) method is applied to determine the optimal location of the UPFC device in a network for the enhancement of the power-system loadability and the minimization of the active power loss in the transmission line. To verify our approach, simulations were performed on the IEEE 14 Bus, 30 Bus, and 57 Bus test systems. The proposed work was implemented in the MATLAB platform.