• Journal of the Institute of Electronics Engineers of Korea TC
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• v.41 no.10
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• pp.45-52
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• 2004

This Paper presents a modified hard decision Viterbi decoder with an error prediction circuit enhancing performance for the burst error inputs. Viterbi decoder employs the maximum likelihood decoding algorithm which shows excellent error correction capability for the random error inputs. Viterbi decoders, however, suffer poor error correction performance for the burst error inputs under the fading channel. The proposed error prediction algorithm increases error correction capability for the burst errors. The algorithm estimaties the burst error data area using the maximum path metric for the erroneous inputs, It calculates burst error intervals based on increases in the maximum values of a path metric. The proposed decoder keeps a performance the same as the conventional decoders on AWGN channels for the IEEE802.l1a WLAN system. It shows performance inproving 15% on the burst error of multi-path fading channels, widely used in mobile systems.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.29 no.6B
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• pp.548-553
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• 2004

Due to the recent advance in wireless communication technology, it is now more demanding to enjoy the high quality of service in the wireless Internal. TCP, which many Internet applications depend on for the end-to-end transport service, is optimized for the wired environment. Consequently, TCP suffers from severe performance degradation in the wireless environment where the bit error rate is relatively high and the burst errors frequently take place. In this paper, we propose a Robust TCP algorithm, which can effectively react against the burst error and significantly improve the TCP performance in wireless Internet. It is shown through the simulations that the Robust TCP performs well in the wireless environment, especially under the burst error condition.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.22 no.7
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• pp.1477-1486
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• 1997

Conventioally the decoding methods and the design of coset codes for burst synchronization and error detection have been based on the concept that slips occuring to the right or to the left with respect to a reference timing are corrected. In this paper we newly approach to the design of coset codes relying on the condition that only a single code word can exists in an observation interval, which provides an extentended view on the conventional approach. A theorem concerning the condition is presented. A combined burst synchronization and error detection system with maximum slip correction capability have been devised based on the theorem and a detection method is falsely accepted in the presented of channel errors. The false acceptance probabilities of the system are derived and its performance is analyzed through computer computation using the derived results.

• Proceedings of the Optical Society of Korea Conference
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• 2003.02a
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• pp.72-73
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• 2003

In volume holographic memory (VHM), two-dimensional data array (i.e. data page) is used for the recording and the retrieving process with the aid of spatial light modulator (SLM) and CCD camera. Due to this two-dimensional parallel data processing, burst errors in this system also have two-dimensional characteristics in a data page domain. In this paper, we present a channel model of the burst noise and burst error for the VHM system using disk type recording media. (omitted)

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.12
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• pp.963-972
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• 1990

Burst errors is a major cause of the performance degradation of digital mobile radio communication over the Rayleigh fading channel. Convoluational codes with block interleaving can be employed to reduce the degredation. This paper has studied the randomness of errors and applied the interleaving to the Viterbi decoders of convolutional codes, Good interleavers for the r=3/4, L=7 convolution code has been searched through computer simulation.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.4
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• pp.21-26
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• 2008

In this paper, a novel 622Mbps burst-mode clock and data recovery (CDR) circuit is proposed for passive optical network (PON) applications. The CDR circuits are implemented with 0.35um CMOS process technology. Locking dynamics is accomplished with instantaneous feature and data are sampled at an optimal timing. This is realized by seven different delay configurations, which are generated from precisely-controlled delay buffers. The experimental results show that the proposed CDR circuits are operating as expected, recovering an incoming 622Mbps burst-mode input data without errors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.98-104
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• 2006

The conventional burst-mode APC(Automatic Power Control) circuit had an effective structure that was suitable for a low power consumption and a monolithic chip. However, as data rate was increased, it caused errors due to the effect of the zero density. In this paper, we invented a new structured peak-comparator which could compensate the unbalance of the injected currents using double gated MOS and MOS diode. And we proposed a new burst-mode APC adopting it. The new peak-comparator in the proposed APC was very robust to zero density variations maintaining the correct decision point of the current comparison at high data rate. It was also suitable for a low power consumption and a monolithic chip due to lack of large capacitors.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.4
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• pp.67-74
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• 2004

As data rate was increased, the conventional burst-mode automatic power control circuit caused errors due to the effort of the mark density variation. To solve this problem we invented a new structured peak-comparator which could eliminate the effect of the mark density variation even in high date rate, and revised the conventional one using it. We proposed a burst-mode automatic power control circuit robust to mark density variations. We found that the peak-comparator in the proposed automatic power control circuit was very robust to mark density variations because it affected very little by the mark density variation in high date rate and in the wide variation range of the reference current and the difference current.

• Convergence Security Journal
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• v.7 no.2
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• pp.129-134
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• 2007

This paper proposes multiple burst error detection and correction scheme for transmission of Huffman coded string. We use bidirectionally decodable codes and introduce insertion of forbidden symbol to find errors. Additional bits are added to original bit streams to correct errors. The total file size id increased but it can detect errors and recover errors real time.

• Journal of the Korean Institute of Telematics and Electronics S
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• v.35S no.5
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• pp.1-10
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• 1998

Satellite communication is getting more important in the coming 21st century because of its wide areas sevice capability, ease of access, and fast channel establishment. As such, satellite communication networks will be the basis of the global communication system in cooperation with the ground ATM networks. In this paper, we consider an efficient transmission methodology of ATM cells over the satellite communication channel. We first analyze possible bottlenecks and performance deterioration factors in the case, and then propose an enhanced cell trasmission mechanism. In order to use satellite channel for ATM cell transmission, the application of complicated channel coding is inevitable. However, the forwared error control such as convolutional encoding brings forth burst errors, which calls for the application of some kind of interleaving mechanism to randomize the burst errors at the receiver. Another aspect which should b econsidered in satellite communication system is the inherent transmission delay, which can be very considered in satellite communication system is te inherent transmission delay, which can be very critical to the delay-sensitive ATM traffic. Therefore, we propose that the processing delay at the block interleaving stage should be controlled propose a variable-size block interleaving mechanism which utilizes the predicted transmission delay for each traffic in the queues of the transmitter. According to the computer simulation, the proposed mechanism could improve the overall performance by drastically reducing the ATM cell drop rate owing to the excessive transmission delay.