• Title/Summary/Keyword: bump

Search Result 653, Processing Time 0.035 seconds

A Study on the High Viscosity Photosensitive Polyimide Degassing and Pumping System (반도체 생산공정을 위한 고점도 감광성 폴리이미드 탈포 및 공급시스템에 관한 연구)

  • Park, Hyoung-Keun
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.16 no.2
    • /
    • pp.1364-1369
    • /
    • 2015
  • As the wire bonding process has been converted into BUMP process due to the high density integration of semiconductor chip, the telecommunication line connecting to semiconductor chip and external devices have become finer. As a result, a more precise work is necessary. However, it is difficult to control quantity given the nature of high viscosity of PSPI and the yield rate continues to decline due to the inflow of bubble. Therefore, this paper developed the D&P(degassing and pumping) system to remove and supply gas that is generated from coating the high viscosity photosensitive polyimide(PSPI) in the semiconductor BUMP process.

Fracture Mode Analysis with ISB Bonding Process Parameter for 3D Packaging (3차원 적층 패키지를 위한 ISB 본딩 공정의 파라미터에 따른 파괴모드 분석에 관한 연구)

  • Lee, Young-Kang;Lee, Jae-Hak;Song, Jun-Yeob;Kim, Hyoung-Joon
    • Journal of Welding and Joining
    • /
    • v.31 no.6
    • /
    • pp.77-83
    • /
    • 2013
  • 3D packaging technology using TSV (Through Silicon Via)has been studied in the recent years to achieve higher performance, lower power consumption and smaller package size because electrical line is shorter electrical resistivity than any other packaging technology. To stack TSV chips vertically, reliable and robust bonding technology is required because mechanical stress and thermal stress cause fracture during the bonding process. Cu pillar/solder ${\mu}$-bump bonding process is usually to interconnect TSV chips vertically although it has weak shape to mechanical stress and thermal stress. In this study, we suggest Insert-Bump (ISB) bonding process newly to stack TSV chips. Through experiments, we tried to find optimal bonding conditions such as bonding temperature and bonding pressure. After ISB bonding, we observed microstructure of bump joint by SEM and then evaluated properties of bump joint by die shear test.

Recent UBM (Under Bump Metallurgy) Studies for Flip Chip Application (플립칩용 UBM (Under Bump Metallurgy)연구의 최근동향)

  • Jang, Se-Young;Paik, Kyung-Wook
    • Proceedings of the International Microelectronics And Packaging Society Conference
    • /
    • 2001.11a
    • /
    • pp.49-54
    • /
    • 2001
  • This paper presents several UBM (Under Bump Metallurgy) systems which are currently used for wafer level solder bumping technology. The advantages and disadvantages of each UBM are summarized from the point of view of process compatability and interface morphological stability.

  • PDF

A Programmable CMOS Negative Resistor using Bump Circuit (Bump 회로를 이용한 Programmable CMOS Negative Resistor)

  • Song, Han-Jung
    • Proceedings of the KIEE Conference
    • /
    • 2002.11c
    • /
    • pp.253-256
    • /
    • 2002
  • A programmable CMOS negative resistor has been designed and fabricated in a 0.5um double poly double metal technology. The proposed CMOS negative resistor consists of a positive feedback OTA and a bump circuit with Gaussian-like I-V curve. Measurements of the fabricated chip confirm that the proposed CMOS resistor shows various negative resistance according to control voltage.

  • PDF

Soldering Process of Au Bump using Longitudinal Ultrasonic (종방향 초음파를 이용한 Au 범프의 솔더링 공정)

  • 김정호;이지혜;유중돈;최두선
    • Journal of Welding and Joining
    • /
    • v.22 no.1
    • /
    • pp.65-70
    • /
    • 2004
  • A soldering process with longitudinal ultrasonic is conducted in this work using the Au bump and substrate. Localized heating of the solder is achieved and the stirring action due to the ultrasonic is found to influence the bond strength and microstructure of the eutectic solder The acceptable bonding condition is determined from the tensile strength. Since the multiple bonds can be formed simultaneously with localized heating, the proposed ultrasonic soldering method appears to be applicable to the high-density electronic package.

A numerical analysis of the degradation of VOC in the photocatalytic microreactors with different inner geometries (광촉매 마이크로 반응기의 내부 형상에 따른 VOC 분해특성에 관한 수치해석적 연구)

  • Yong, Jung-Kwon;Kim, Chang-Nyung;Youm, Min-Qou
    • Proceedings of the KSME Conference
    • /
    • 2007.05b
    • /
    • pp.2896-2900
    • /
    • 2007
  • A numerical analysis was carried out to investigate the degradation of Volatile Organic Compounds (VOC) in photocatalytic microreactors with different inner geometries. Two different cases of microreactor were considered, namely, one microreactor has bump on the channel and the other has no bump on the channel. The removal efficiency of VOC has been calculated by the Langmuir-Hinshelwood reaction rate equation that was obtained from the experimental results. From the numerical calculations, it was observed that the conversion ratio of VOC for the microchannel with bump is about 4.5% greater than the microchannel without bump. And the mass transfer characteristics in the microreactor are also shown in numerical results. These results can be used effectively for the photocatalytic numerical analysis.

  • PDF

The Stability of Plating Solution and the Current Density Characteristics of the Sn-Ag Plating for the Wafer Bumping

  • Kim, Dong-Hyun;Lee, Seong-Jun
    • Journal of the Korean institute of surface engineering
    • /
    • v.50 no.3
    • /
    • pp.155-163
    • /
    • 2017
  • In this study, the effects of the concentration of metal ions and the applied current density in the Sn-Ag plating solutions were examined in regards to the resulting composition and morphology of the solder bumps' surface. Furthermore the effect of any impurities present in the methanesulfonic acid used as a base acid in the Sn-Ag solder plating solution on the stability of plating solution as well as the characteristics of the Sn-Ag alloys films was also explored. As expected, the uniform bump was obtained by means of removing impurities in the plating solution. Consequently the resultant solder bump was obtained in an optimal current density of the range of $1A/dm^2$ to $15A/dm^2$, which has acceptable bump shape and surface roughness with 12inch wafer trial results.

Bump mapping algorithm for polygonal model and its hardware implementation (다각형 모델에서 범프 맵핑을 수행하기 위한 알고리즘과 하드웨어 구현)

  • Choi, Seung-Hak;Mun, Byung-In;Eo, Kil-Su;Lee, Hong-Youl
    • Journal of the Korea Computer Graphics Society
    • /
    • v.2 no.1
    • /
    • pp.15-23
    • /
    • 1996
  • Bump mapping is an elegant rendering technique to simulate wrinkled surfaces such as bark, which enables to produce more realistic image than texture-mapped one. This paper presents a new algorithm for bump mapping along with a hardware architecture to run our algorithm in real-time. The proposed approach is more efficient than previous one, and in particular, our hardware architecture is simpler to implement.

  • PDF

Friction Effects on the Performance of Double-Bumped Air Foil Bearings (이중범프포일 공기베어링의 성능에 미치는 마찰효과)

  • Kim, Young-Cheol;Lee, Dong-Hyun;Kim, Kyung-Woong
    • Tribology and Lubricants
    • /
    • v.23 no.4
    • /
    • pp.162-169
    • /
    • 2007
  • This paper deals with friction effects on the performance of double-bumped AFBs. The stiffness and damping coefficients of the double bump vary depending on the external load and its friction coefficient. The double bump can be either in the single or double active region depending on vertical deflection. The equivalent stiffness and damping coefficients of the bump system are derived from the vertical and horizontal deflection of the bump, including the friction effect. A static and dynamic performance analysis is carried out by using the finite difference method and the perturbation technique. The results of the performance analysis for a double-bumped AFB are compared with those obtained for a single-bumped AFB. This paper successfully proves that a double bumped AFB has higher load capacity, stiffness, and damping than a single-bumped AFB in a heavily loaded condition.

FLIP CHIP SOLDER BUMPING PROCESS BY ELECTROLESS NI

  • Lee, Chang-Youl;Cho, Won-Jong;Jung, Seung-Boo;Shur, Chang-Chae
    • Proceedings of the KWS Conference
    • /
    • 2002.10a
    • /
    • pp.456-462
    • /
    • 2002
  • In the present work, a low cost and fine pitch bumping process by electroless Ni/immersion Au UBM (under bump metallurgy) and stencil printing for the solder bump on the Al pad is discussed. The Chip used this experimental had an array of pad 14x14 and zincate catalyst treatment is applied as the pretreatment of Al bond pad, it was shown that the second zincating process produced a dense continuous zincating layer compared to first zincating. Ni UBM was analyzed using Scanning electron microscopy, Energy dispersive x-ray, Atomic force microscopy, and X-ray diffractometer. The electroless Ni-P had amorphous structures in as-plated condition. and crystallized at 321 C to Ni and Ni$_3$P. Solder bumps are formed on without bridge or missing bump by stencil print solder bump process.

  • PDF