• Title/Summary/Keyword: buffer state

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An Asymmetric Buffer Management Policy for SSD (SSD를 위한 비대칭 버퍼 관리 기법)

  • Jung, Ho-Young;Kang, Soo-Yong;Cha, Jae-Hyuk
    • Journal of Digital Contents Society
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    • v.12 no.2
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    • pp.141-150
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    • 2011
  • Recently the Solid State Drive (SSD) is widely used for storage system of various mobile devices. In this case, existing buffer replacement algorithms based on the hard disk do not consider characteristics of flash memory, so it caused performance degradation of the system. This paper proposes a novel buffer replacement policy called ABM (Asymmetric Buffer Management) policy. ABM policy separates read and write buffer space and applies different replacement unit and replacement algorithm for each buffer. In addition, write buffer delay scheme and dynamic size adaptation algorithm is applied for better performance. ABM outperforms other replacement policies, especially ABM-LRU-CLC shows 32% better performance than normal LRU policy.

A Novel Hydrogen-reduced P-type Amorphous Silicon Oxide Buffer Layer for Highly Efficient Amorphous Silicon Thin Film Solar Cells (고효율 실리콘 박막태양전지를 위한 신규 수소저감형 비정질실리콘 산화막 버퍼층 개발)

  • Kang, Dong-Won
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.65 no.10
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    • pp.1702-1705
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    • 2016
  • We propose a novel hydrogen-reduced p-type amorphous silicon oxide buffer layer between $TiO_2$ antireflection layer and p-type silicon window layer of silicon thin film solar cells. This new buffer layer can protect underlying the $TiO_2$ by suppressing hydrogen plasma, which could be made by excluding $H_2$ gas introduction during plasma deposition. Amorphous silicon oxide thin film solar cells with employing the new buffer layer exhibited better conversion efficiency (8.10 %) compared with the standard cell (7.88 %) without the buffer layer. This new buffer layer can be processed in the same p-chamber with in-situ mode before depositing main p-type amorphous silicon oxide window layer. Comparing with state-of-the-art buffer layer of AZO/p-nc-SiOx:H, our new buffer layer can be processed with cost-effective, much simple process based on similar device performances.

Analysis of Dynamic bandwidth allocation scheme for ATM/LAN interworking unit (ATM/LAN 연동장치의 동적대역할당 방식에 대한 성능해석)

  • 이은준;우상철;윤종호
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.21 no.12
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    • pp.3132-3143
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    • 1996
  • In the evaluation of Broadband-ISDN, the main issue is to interconnect existing LANs and MANs to B-ISDN based on Asynchrous Transfer Mode. However, LANs provide connectionless services, whereas the ATM network provides connection-oriented services. So some problem arises from accessing ATM switchs to transparently transmit connectionless data via B-ISDN. Two methods then were recommended by ITU-TS to support the connectionaless services. In the paper, we do the numerical analysis, using the stochastic fluid flow method, of dynamic bandwidth allocation sheme with two class traffics in the virtual path established between Interworking Units(JWUS) interconnecting LANs to an ATM network and Connectionless Servers(CLSs). The loss mechanism of each traffic is controlled by the contents of buffer. The vandwidth which the IWU requests the CLS is estimated by the number of On-Off sources in the On state. We use the stochsastic fluide flow method which is to find the steady-state joint probability in each level of the IWU buffer. The length of the IWU buffer as the real random variable is changed by traffics entering the IWU.

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PERFORMANCE ANALYSIS OF A STATISTICAL MULTIPLEXER WITH THREE-STATE BURSTY SOURCES

  • Choi, Bong-Dae;Jung, Yong-Wook
    • Communications of the Korean Mathematical Society
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    • v.14 no.2
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    • pp.405-423
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    • 1999
  • We consider a statistical multiplexer model with finite buffer capacity and finite number of independent identical 3-state bursty voice sources. The burstiness of the sources is modeled by describing both two different active periods (at the rate of one packet perslot) and the passive periods during which no packets are generated. Assuming a mixture of two geometric distributions for active period and a geometric distribution for passive period and geometric distribution for passive period, we derive the recursive algorithm for the probability mass function of the buffer contents (in packets). We also obtain loss probability and the distribution of packet delay. Numerical results show that the system performance deteriorates considerably as the variance of the active period increases. Also, we see that the loss probability of 2-state Markov models is less than that of 3-state Markov models.

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Adhesion and Interface Chemical Reactions of Cu/CuO/Polyimide System (Cu/CuO/Polyimide 시스템의 접착 및 계면화학 반응)

  • Lee, K.W.;Chae, H.C.;Choi, C.M.;Kim, M.H.
    • Korean Journal of Materials Research
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    • v.17 no.2
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    • pp.61-67
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    • 2007
  • The magnetron reactive sputtering was adopted to deposit CuO buffer layers on the polyimide surfaces for increasing the adhesion strength between Cu thin films and polyimide, varying $O_2$ gas flow rate from 1 to 5 sccm. The CuO oxide was formed through all the $O_2$ gas flow rates of 1 to 5 sccm, showing the highest value at the 3 sccm $O_2$ gas flow rate. The XPS analysis revealed that the $Cu_2O$ oxide was also formed with a significant ratio during the reactive sputtering. The adhesion strength is mainly dependent on the amount of CuO in the buffer layers, which can react with C-O-C or C-N bonds on the polyimide surfaces. The adhesion strength of the multi-layered Cu/buffer layer/polyimide specimen decreased linearly as the heating temperature increased to $300^{\circ}C$, even though there showd no significant change in the chemical state at the polyimide interface. This result is attributed to the decrease in surface roughness of deposited copper oxide on the polyimide, when it is heated.

β-Glucosidase Recovery from a Solid-State Fermentation System by Aspergillus niger (Aspergillus niger 의 고체상태 발효 시스템에서의 β-Glucosidase 회수)

  • Chandra, M. Subhosh;Reddy, B. Rajasekhar;Choi, Yong-Lark
    • Journal of Life Science
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    • v.20 no.7
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    • pp.999-1004
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    • 2010
  • Investigations were carried out on a $\beta$-glucosidase produced by Aspergillus niger under solid-state fermentation conditions as a model of enzyme recovery from fermented wheat bran. The leaching efficiency of distilled water to recover the enzyme from the fermented bran was higher than acetate buffer, citrate buffer, citrate-phosphate buffer and 5% methanol; thus, the conditions were further optimized with distilled water as the extracting agent. After fermented bran was washed three times with distilled water for 1.5 hr each under shaking conditions at 1:5 solid to solvent ratio, a maximum recovery of 0.025 U/g of wheat bran was obtained.

On-line Monitoring of IPTG Induction for Recombinant Protein Production Using an Automatic pH Control Signal

  • Hur Won;Chung Yoon-Keun
    • Biotechnology and Bioprocess Engineering:BBE
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    • v.10 no.4
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    • pp.304-308
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    • 2005
  • The response of IPTG induction was investigated through the monitoring of the alkali consumption rate and buffer capacity during the cultivation of recombinant E. coli BL21 (DE3) harboring the plasmid pRSET-LacZ under the control of lac promoter. The rate of alkali consumption increased along with cell growth, but declined suddenly after approximately 0.2 h of IPTG induction. The buffer capacity also declined after 0.9 h of IPTG induction. The profile of buffer capacity seems to correlate with the level of acetate production. The IPTG response was monitored only when introduced into the mid-exponential phase of bacterial cell growth. The minimum concentration of IPTG for induction, which was found out to be 0.1 mM, can also be monitored on-line and in-situ. Therefore, the on-line monitoring of alkali consumption rate and buffer capacity can be an indicator of the metabolic shift initiated by IPTG supplement, as well as for the physiological state of cell growth.

EFFECT OF THE NUMBER OF ACTIVE SOURCES ON ABR BUFFER SIZE

  • Lee, Yu-Tae;Han, Dong-Hwan
    • Journal of applied mathematics & informatics
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    • v.7 no.3
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    • pp.861-873
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    • 2000
  • Rate-based flow control plays an important role for efficient traffic management of Available Bit Rate(ABR) services. We deal with the problem of the buffer dimension for rate-based ABR control. In this paper, we analyze the Allowed Cell Rate(ACR) of a source and the queue size in a steady state. First, we investigate the effect of the number of active sources on the behavior of the ACR and the maximum queue size. Reflecting the effect of this real scenes, we determine the optimal buffer size and buffer threshold. Furthermore, our analytic results are compared with the case when the effect of the number of active sources is disregarded.

ATM Rate Based Traffic Control with Bode Principle

  • Jing, Yuanwei;Zeng, Hui;Jing, Qingshen;Yuan, Ping
    • International Journal of Control, Automation, and Systems
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    • v.6 no.2
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    • pp.214-222
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    • 2008
  • Bode principle is applied to carry out traffic control for rate based ATM network, which guarantees the higher buffer utilization, buffer overflow-free, and well utilization of bandwidth. The principle confirms the relationship between the threshold of buffer queue and the network bandwidth, as well as the relationship between the threshold of buffer and source input rate. Theoretic warrant of the buffer threshold is proposed. The reference range of source input rate is provided in theory, which makes the source end respond to the change of network state rapidly and dynamically, and then the effect of time delay to the traffic control is avoided. Simulation results show that the better steady and dynamic performances of networks are obtained by Bode principle.

A 3.3V/5V Low Power TTL-to-CMOS Input Buffer Controlled by Internal Activation Clock Pulse (활성 클럭펄스로 제어되는 3.3V/5V 저전력 TTL-to-CMOS 입력 버퍼)

  • Bae, Hyo-Kwan;Ryu, Beom-Seon;Cho, Tae-Won
    • Journal of IKEEE
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    • v.5 no.1 s.8
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    • pp.52-58
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    • 2001
  • This paper describes a TTL-to-CMOS input buffer of an SRAM which dissipates a small operating power dissipation. The input buffer utilizes a transistor structure with latch circuit controlled by a internal activation clock pulse. During the low state of that pulse, input buffer is disabled to eliminate dc current. Otherwise, the input buffer operates normally. Simulation results showed that the power-delay product of the purposed input buffer is reduced by 33.7% per one input.

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