• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.609-612
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• 1999

In this paper, we propose wavelet transform image compression method such that an image is decomposed into multiresolutions using biorthogonal wavelet transform with linear phase response property and decomposed subbands are classified by maximum classification gain. The classified data is quantized by allocating bits in accordance with classified class informations within subbands through arbitrary set bit allocation algorithm. And then, quantized data in each subband are entropy coded. The proposed coding method is that the quantized data perform shuffling before entropy coding in order to remove sign bit plane. And the context is assigned by maximum correlation direction for bit plane coding.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.49 no.3
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• pp.30-36
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• 2012

block truncation coding(BTC) image compression is known as a simple and efficient technology for image compression algorithm. In this paper, we propose RMC-BTC algorithm(RMC : reduction method chrominace data) for color image compression. To compress chrominace data, in every BTC block, the RMC-BTC coding employs chrominace data expressed with average of chrominace data and using method of luminance data bit-map to represented chrominance data bit-map. Experimental results shows efficiency of proposed algorithm, as compared with PSNR and compression ratio of the conventional BTC method.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.1215-1218
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• 1998

본 논문은 Digital Audio Compression(AC-3) Standard 인 A-52를 기반으로 하였으며 Borland C++3.1 Compiler를 사용하여 AC-3 Decoding Algorithm 구현하였다. Input Stream은 DVD VOB File에서 AC-3 Stream만을 분리하여 사용하며 최종 출력은 16 Bit PCM File이다. AC-3의 Frame구조는 Synchronization Information, Bit Stream Information, Audio Block, Auxiliary Data, Error Check로 구성된다. Aduio Block 은 모두 6개의 Block으로 나뉘어져 있다. BSI와 Side Information을 참조하여 Exponent를 추출하여 Exponent Strategy에 따라 Exponent를 복원한다. 복원된 Exponent 정보를 이용하여 Bit Allocation을 수행하여 각각의 Mantissa에 할당된 Bit수를 계산하고 Stream으로부터 Mantissa를 추출한다. Coupling Parameter를 참조하ㅕ Coupling Channel을 Original Channel로 복원시킨다. Stereo Mode에 대해서는 Rematrixing을 수행한다. Dynamic Range는 Mantissa와 Exponent의 Magnitude를 바꾸는 것으로 선택적으로 사용할 수 있다. Mantissa와 Exponent를 결합하여 Floating Point coefficient로 만든 후 Inverse Transform을 수행하면 PCM Data를 얻을 수 있다. PC에서 듣기 위해서는 Multi Channel을 Stereo나 Mono로 Downmix를 수행한다. 이렇게 만들어진 PCM data는 PCM Data를 재생하는 프로그램으로 재생할 수 있다.

• Journal of Sensor Science and Technology
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• v.24 no.2
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• pp.124-130
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• 2015

This paper presents a high performance HIGHT processor that can be applicable for CCM mode. In fact, HIGHT algorithm is a 64-bit block cipher. However, the proposed HIGHT extends the basic block length to 128-bit. The proposed HIGHT is operated as 128-bit block cipher and it can treat 128-bit block at once. Thus, it can be applicable for the various WSN applications that need fast and ultralight 128-bit block cipher, in particular, to be operated in CCM mode. In addition, the proposed HIGHT processor shares the common logics such as 128-bit key scheduler and control logics during encryption and decryption to reduce the area overhead caused by the extension of data block length. From the simulation results, the circuit area and power consumption of the proposed HIGHT are increases as 40% and 64% compared to the conventional 64-bit counterpart. However, the throughput of the proposed HIGHT can be up to two times as fast. Consequently, the proposed HIGHT is useful for USN and handheld devices based on battery as well as RFID tag the size of circuit is less than 5,000 gates.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.2 s.314
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• pp.39-45
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• 2007

This paper presents a novel scheme that quickly searches for the sweet spot of multiple array antennas, and locks on to it for high-speed millimeter wavelength transmissions, when communications to another antenna array are disconnected. The proposed method utilizes a modified genetic algorithm, which selects a superior initial group through preprocessing in order to solve the local solution in agenetic algorithm. TDD (Time Division Duplex) is utilized as the transfer method and data controller for the antenna. Once the initial communication is completed for the specific number of individuals, no longer antenna's data will be transmitted until each station processes GA in order to produce the next generation. After reproduction, individuals of the next generation become the data, and communication between each station is made again. Simulation results of 1:1, 1:2, 1:5 array antennas confirmed the efficiency of the proposed method. The 16bit split is 8bit, but it has similar performance as 16bit gene.

• The Transactions of the Korea Information Processing Society
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• v.2 no.6
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• pp.857-865
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• 1995

In this paper, a nibble RLE(Run Length Encoding) code for real time compression and decompression of Hanguel bit map font and printer data is proposed. The nibble RLE code shows good compression ratio in complete form Hangeul Myoungjo and Godik style bit map font and printer output bit map data. And two ASICs seperating compression and decompression are designed and simulated on CAD to verify the proposed code. The 0.8 micron CMOS Sea of Gate is used to implement the ASICs in amount of 2, 400 gates, and these are running at 25MHz. Therefore, the proposed code could be implemented with simple hardware and performs 100M bit/sec compression and decomression at maximum, it is good for real time applications.

• Journal of the Korea Society of Computer and Information
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• v.15 no.4
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• pp.27-36
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• 2010

The paper proposes RFB(Record Filtering using Bit-vector) join algorithm, an in-network strategy that uses bit-vector to drastically reduce the size of data and hence the communication cost. In addition, by eliminating data not involved in join result prior to actual join, communication cost can be minimized since not all data need to be moved to the join nodes. The simulation result shows that the proposed RFB algorithm significantly reduces the number of bytes to be moved to join nodes compared to the popular synopsis join(SNJ) algorithm.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.32 no.8A
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• pp.847-857
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• 2007

For the implementation of a RFID system, an anti-collision algorithm is required to identify multiple tags within the range of a RFID Reader. A Bit-by-Bit algorithm is defined by Auto ID Class 0. In this paper, we propose a SBBB(Stack Bit-by-Bit) algorithm. The SBBB algorithm save the collision position and makes a query using the saved data. SBBB improve the efficiency of collision resolution. We show the performance of the SBBB algorithm by simulation. The performance of the proposed algorithm is higher than that of BBB algorithm. Especially, the more each tag bit streams are the duplicate, the higher performance is.

• Journal of Information Display
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• v.2 no.2
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• pp.1-6
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• 2001

A $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with a new integrated 8-bit parallel-serial digital data driver was proposed and designed. For high resolution, the proposed parallel-serial digital driver used serial video data rather than parallel ones. Thus, digital circuits for driving one column line could be integrated within very small width. The parallel-serial digital data driver comprised of shift registers, latches, and serial digital-to-analog converters (DAC's). We designed a $1"{\times}l"$, $512{\times}512$ poly-Si TFT-LCD with integrated 8-bit parallel-serial digital data drivers by a circuit simulator which has physical-based analytical model of poly-Si TFT's. The fabricated shift register well operated at 2 MHz and $V_{DD}$=10V and the fabricated poly-Si TFT serial DAC's, which converts serial digital data to an analog signal, could convert one bit within $2.8{\mu}s$. The driver circuits for one data line occupied $8100{\times}50{\mu}m^2$ with $4{\mu}m$ design rule.

• Journal of Korean Institute of Industrial Engineers
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• v.21 no.2
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• pp.183-194
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• 1995

This research paper describes several possible suggestions which are essential to develop for Built-In-Test(BIT) related systems, such as more precise BIT parameter analysis, sensitivity analysis of the impact of BIT on redundant systems, statistical inference of field data for BIT performance parameters, methods of reducing BIT false alarms, BIT application in industrial automation and remote control, prevent the system from the impact of BIT failure, undetections and false alarms, life cycle cost analysis for BIT. And, it is mainly focused on redundancy technique for solving BIT diagnostic problems. Algorithms for redundant systems : overlapping technique, flexible redundant BITs are presented and case study will be shown based on various experiment.