센서학회지 (Journal of Sensor Science and Technology)

  • 제24권2호
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  • Pages.124-130
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  • 2015
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  • 1225-5475(pISSN)
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  • 2093-7563(eISSN)
한국센서학회 (The Korean Sensors Society)
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WSN을 위한 128비트 확장된 데이터 블록을 갖는 고성능 HIGHT 설계

High Performance HIGHT Design with Extended 128-bit Data Block Length for WSN

  • 김승열 (충북대학교 정보통신공학부) ;
  • 이제훈 (강원대학교 전자정보통신공학부)
  • Kim, Seong-Youl (School of Informatioin and Communication Engineering, Chungbuk National University) ;
  • Lee, Je-Hoon (Div. of of Electronics, Information and Communication Engineering, Kangwon National Unversity)
  • 투고 : 2015.03.23
  • 심사 : 2015.04.02
  • 발행 : 2015.03.31
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초록

This paper presents a high performance HIGHT processor that can be applicable for CCM mode. In fact, HIGHT algorithm is a 64-bit block cipher. However, the proposed HIGHT extends the basic block length to 128-bit. The proposed HIGHT is operated as 128-bit block cipher and it can treat 128-bit block at once. Thus, it can be applicable for the various WSN applications that need fast and ultralight 128-bit block cipher, in particular, to be operated in CCM mode. In addition, the proposed HIGHT processor shares the common logics such as 128-bit key scheduler and control logics during encryption and decryption to reduce the area overhead caused by the extension of data block length. From the simulation results, the circuit area and power consumption of the proposed HIGHT are increases as 40% and 64% compared to the conventional 64-bit counterpart. However, the throughput of the proposed HIGHT can be up to two times as fast. Consequently, the proposed HIGHT is useful for USN and handheld devices based on battery as well as RFID tag the size of circuit is less than 5,000 gates.

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참고문헌

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