• 제목/요약/키워드: bipolar transistor

검색결과 332건 처리시간 0.028초

A Design of BJT-based ESD Protection Device combining SCR for High Voltage Power Clamps

  • Jung, Jin-Woo;Koo, Yong-Seo
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제14권3호
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    • pp.339-344
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    • 2014
  • This paper presents a novel bipolar junction transistor (BJT) based electrostatic discharge (ESD) protection device. This protection device was designed for 20V power clamps and fabricated by a process with Bipolar-CMOS-DMOS (BCD) $0.18{\mu}m$. The current-voltage characteristics of this protection device was verified by the transmission line pulse (TLP) system and the DC BV characteristic was verified by using a semiconductor parameter analyzer. From the experimental results, the proposed device has a trigger voltage of 29.1V, holding voltage of 22.4V and low on-resistance of approximately $1.6{\Omega}$. In addition, the test of ESD robustness showed that the ESD successfully passed through human body model (HBM) 8kV. In this paper, the operational mechanism of this protection device was investigated by structural analysis of the proposed device. In addition, the proposed device were obtained as stack structures and verified.

HCI Gettering Oxidation을 이용한 BJT의 저잡음화에 관한 실험적 연구 (An Experimental Study on the Low Noise Property of the Bipolar Junction Transistor Fabricated by HCI Gettering)

  • 최세곤;서희돈
    • 대한전자공학회논문지
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    • 제21권1호
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    • pp.7-12
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    • 1984
  • 본 논문에서는 저잡음 BJT를 만들기 위하여 HCI gettering oxidation 방법을 적용하였다. HCI 양의 변화에 따른 플리키 잡음 spectral intensity의 변화를 측정한 결과 BJT의 플리키 잡음이 표면 상태에 의존하고 있음과 저잡음 BJT를 만들기 위한 oxidation 공정의 gettering 조건은 HCI 양이 2%일 때 최적임을 알 수 있었다. 또 에미터 광산 공정에서 형성된 PSG층의 gettering 효과는 HCI gettering 결과에 비해 미약함도 알게 되었다.

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Improved Circuit Model for Simulating IGBT Switching Transients in VSCs

  • Haleem, Naushath Mohamed;Rajapakse, Athula D.;Gole, Aniruddha M.
    • Journal of Power Electronics
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    • 제18권6호
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    • pp.1901-1911
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    • 2018
  • This study presents a circuit model for simulating the switching transients of insulated-gate bipolar transistors (IGBTs) with inductive load switching. The modeling approach used in this study considers the behavior of IGBTs and freewheeling diodes during the transient process and ignores the complex semiconductor physics-based relationships and parameters. The proposed circuit model can accurately simulate the switching behavior due to the detailed consideration of device-circuit interactions and the nonlinear nature of model parameters, such as internal capacitances. The developed model is incorporated in an IGBT loss calculation module of an electromagnetic transient simulation program to enable the estimation of switching losses in voltage source converters embedded in large power systems.

Simulation of the light emission from quantum-well based heterojunction bipolar transistors

  • 박영규;박문호;김광웅;박정호
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2009년도 추계학술대회 논문집
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    • pp.52-52
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    • 2009
  • In this work, we demonstrate the modelling and simulation of the AlGaAs/GaAs quantum-well based light emitting transistor(LET). Based on the experimental and theoretical model, we have compared between a heterojunction bipolar transistor(HBT) structure with quantum wells in the base region and a HBT without quantum wells in the base region. For the purpose of optimizing device design, several analytic and numerical studies have been presented.

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전력용 MOSFET의 특성 및 기술동향 (The Characteristics and Technical Trends of Power MOSFET)

  • 배진용;김용
    • 전기학회논문지
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    • 제58권7호
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    • pp.1363-1374
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    • 2009
  • This paper reviews the characteristics and technical trends in Power MOSFET technology that are leading to improvements in power loss for power electronic system. The silicon bipolar power transistor has been displaced by silicon power MOSFET's in low and high voltage system. The power electronic technology requires the marriage of power device technology with MOS-gated device and bipolar analog circuits. The technology challenges involved in combining power handling capability with finger gate, trench array, super junction structure, and SiC transistor are described, together with examples of solutions for telecommunications, motor control, and switch mode power supplies.

High-Speed BiCMOS Comparator

  • Jirawath, Parnklang;Wanchana, Thongtungsai
    • 제어로봇시스템학회:학술대회논문집
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    • 제어로봇시스템학회 2000년도 제15차 학술회의논문집
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    • pp.510-510
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    • 2000
  • This paper introduces the design of BiCMOS latched comparator circuit for high-speed system application, which can be used in data conversion, instrumentation, communication system etc. By exploiting the advantage technology of the combination of both the bipolar transistor and the CMOS transistor devices. The comparator circuit includes an input stage that combines MOS sampling with a bipolar regenerative amplifier. The resistive load of conventional current-steering comparator is replaced by a load, which is made by a NMOS transistor. The advantage of design and PSPICE simulation of BiCMOS latched comparator are the circuit will obtain wide bandwidth with lowest power consumption at a single supply voltage. All the characteristics of the proposed BiCMOS latched comparator circuit is carried out by simulation program.

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IGBT 설계 Parameter 연구 (A Study on Parameters for Design of IGBT)

  • 노영환;이상용;김윤호
    • 한국철도학회:학술대회논문집
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    • 한국철도학회 2009년도 춘계학술대회 논문집
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    • pp.1943-1950
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    • 2009
  • The development of high voltage Insulated Gate Bipolar Transistor (IGBT) have given new device advantage in the areas where they compete with conventional GTO (Gate Turnoff Thyristor) technology. The IGBT combines the advantages of a power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) and a bipolar power transistor. The change of electrical characteristics for IGBT is mainly coming from the change of characteristics of MOSFET at the input gate and the PNP transistors at the output. The gate oxide structure gives the main influence on the changes in the electrical characteristics affected by environments such as radiation and temperature, etc.. The change of threshold voltage, which is one of the important design parameters, is brought by charge trapping at the gate oxide. In this paper, the electrical characteristics are simulated by SPICE simulation, and the parameters are found to design optimized circuits.

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소자격리구조가 바이폴라 트랜지스터의 콜렉터 전기용량에 주는 영향 (Effects of Isolation Oxide Structure on Base-Collector Capacitance)

  • Hang Geun Jeong
    • 전자공학회논문지A
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    • 제30A권10호
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    • pp.20-26
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    • 1993
  • The base-collector capacitance of an npn bipolar transistor in bipolar or BiCMOS technology has significant influence on the switching performances, and comprises pnjunction component and MOS component. Both components have complicated dependences on the isolation oxide structure, epitaxial doping density, and bias voltage. Analytical/empirical formulas for both components are derived in this paper for a generic isolation structure as a function of epitaxial doping density and bias voltage based on some theoretical understanding and two-dimensional device simulations. These formulas are useful in estimating the effect of device isoation schemes on the switching speed of bipolar transistors.

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