Electrical Characteristics of BLC, MTG Adders Using $2{\mu}m$ CMOS Process
($2{\mu$}$ CMOS 공정을 이용한 BLC, MTG 가산기의 전기적 특성)
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- Journal of the Korean Institute of Telematics and Electronics
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- v.27 no.1
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- pp.59-67
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- 1990